Datasheet

 2011-2012 Microchip Technology Inc. Preliminary DS41579D-page 137
PIC16(L)F1782/3
13.10 Register Definitions: PORTE
REGISTER 13-26: TRISE: PORTE TRI-STATE REGISTER
U-0 U-0 U-0 U-0 U-1
(1)
U-0 U-0 U-0
— — — — — — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-4 Unimplemented: Read as ‘0’
bit 3 Unimplemented: Read as ‘1’
bit 2-0 Unimplemented: Read as ‘0’
Note 1: Unimplemented, read as ‘1’.
REGISTER 13-27: WPUE: WEAK PULL-UP PORTE REGISTER
U-0 U-0 U-0 U-0 R/W-1/1 U-0 U-0 U-0
— — — —
WPUE3
— — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-4 Unimplemented: Read as ‘0’
bit 3 WPUE3: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
bit 2-0 Unimplemented: Read as ‘0’
Note 1: Global WPUEN
bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is in configured as an output.