Datasheet

 2012 Microchip Technology Inc. DS80541C-page 9
PIC16(L)F1782/1783
6. Module: PSMC
6.1 Rising Edge Inhibit
When the period and falling edge sources are from
the same asynchronous input, then a race
condition may occur where the period is detected
before the falling edge. When this occurs, then the
falling edge properly terminates the cycle but
subsequent rising edge inputs are ignored.
Work around
To configure the PSMC for fixed off-time and
variable frequency, set the following:
• Period = Asynchronous feedback
• Rising Event = Synchronous @
PSMCxPH = 0
• Falling Event = Synchronous @
PSMCxDC = Off Time
• Output inverted so drive time is from falling
event to period event.
Affected Silicon Revisions
6.2 Auto-Restart
When auto-shutdown is configured for auto-restart
and the shutdown source is a comparator, then
auto-restart may fail to occur after the shutdown
condition ceases.
Work around
Enable the zero-latency filter of the comparator
used for auto-shutdown.
Affected Silicon Revisions
7. Module: Low-Dropout (LDO) Voltage
Regulator
7.1 Low-Power Sleep mode at ambient
temperatures below 0
C
Under the following conditions:
• ambient temperatures below 0
C
• while in Sleep mode
• VREGCON configured for Low-Power Sleep
mode (VREGPM = 1)
On very rare occasions, the LDO voltage will drop
below the minimum V
DD, causing unexpected
device Resets.
Work around
For applications that operate at ambient
temperatures below 0
C, use the LDO voltage
regulator in Normal-Power mode (VREGPM = 0).
Affected Silicon Revisions
8. Module: FVR
8.1 FVR Module
When using the FVR module, if the gain amplifier
outputs are set via the CDAFVR or ADFVR bits in
FVRCON while the module is disabled (FVREN =
0), the internal oscillator frequency may shift,
device current consumption can increase, and a
Brown-out Reset may occur. Additionally, after the
FVREN is enabled, a switch from 4x to 1x can also
cause a reset.
Work around
Set the FVREN bit of FVRCON to enable the
module prior to adjusting the amplifier output
selections with the CDAFVR and ADFVR bits.
Always set the amplifier output selections to off
(‘00’) before disabling the FVR module.
When switching from 4x to 1x, first switch from 4x
to 2x and then from 2x to 1x.
Affected Silicon Revisions
9. Module: PFM Self Writes
9.1 PFM
Writes to the PFM will not execute if the device’s
clock source is HS, ECH, or the Internal oscillator
is at either 8MHz or 16MHz. The DFM is
unaffected.
Work around
To write to the PFM, the clock source must be
one of the following settings: Internal oscillator
set to 4MHz or lower, ECM, ECL, XT, External RC,
LP or T1OSC.
Affected Silicon Revisions
B2 B4
X X
B2 B4
X
B2 B4
X X
B2 B4
X X
B2 B4
X