Datasheet

PIC16(L)F1516/7/8/9
DS41452C-page 84  2010-2012 Microchip Technology Inc.
8.3 Register Definitions: Voltage Regulator Control
TABLE 8-1: SUMMARY OF REGISTERS ASSOCIATED WITH POWER-DOWN MODE
REGISTER 8-1: VREGCON: VOLTAGE REGULATOR CONTROL REGISTER
(1)
U-0 U-0 U-0 U-0 U-0 U-0 R/W-0/0 R/W-1/1
— — — — — —VREGPMReserved
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-2 Unimplemented: Read as ‘0’
bit 1 VREGPM: Voltage Regulator Power Mode Selection bit
1 = Low-Power Sleep mode enabled in Sleep
(2)
Draws lowest current in Sleep, slower wake-up
0 = Normal Power mode enabled in Sleep
(2)
Draws higher current in Sleep, faster wake-up
bit 0 Reserved: Read as ‘1’. Maintain this bit set.
Note 1: PIC16F1516/7/8/9 only.
2: See Section 25.0 “Electrical Specifications”.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 76
IOCBF IOCBF7 IOCBF6 IOCBF5 IOCBF4 IOCBF3 IOCBF2 IOCBF1 IOCBF0 129
IOCBN IOCBN7 IOCBN6 IOCBN5 IOCBN4 IOCBN3 IOCBN2 IOCBN1 IOCBN0 129
IOCBP IOCBP7 IOCBP6 IOCBP5 IOCBP4 IOCBP3 IOCBP2 IOCBP1 IOCBP0 129
PIE1 TMR1GIE ADIE RCIE
TXIE SSPIE CCP1IE TMR2IE TMR1IE 77
PIE2
OSFIE — — — BCLIE — — CCP2IE 78
PIR1 TMR1GIF ADIF RCIF
TXIF SSPIF CCP1IF TMR2IF TMR1IF 79
PIR2
OSFIF — — — BCLIF — — CCP2IF 80
STATUS
— — —TOPD Z DC C 21
VREGCON
(1)
— — — — — —VREGPM
Reserved
84
WDTCON
— —
WDTPS<4:0>
SWDTEN 89
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used in Power-down mode.
Note 1: PIC16F1516/7/8/9 only.