Datasheet

 2010-2012 Microchip Technology Inc. DS41452C-page 177
PIC16(L)F1516/7/8/9
20.3.7 OPERATION IN SLEEP MODE
In Sleep mode, the TMR2 register will not increment
and the state of the module will not change. If the CCPx
pin is driving a value, it will continue to drive that value.
When the device wakes up, TMR2 will continue from its
previous state.
20.3.8 CHANGES IN SYSTEM CLOCK
FREQUENCY
The PWM frequency is derived from the system clock
frequency. Any changes in the system clock frequency
will result in changes to the PWM frequency. See
Section 5.0 “Oscillator Module (with Fail-Safe
Clock Monitor)”
for additional details.
20.3.9 EFFECTS OF RESET
Any Reset will force all ports to Input mode and the
CCP registers to their Reset states.
20.3.10 ALTERNATE PIN LOCATIONS
This module incorporates I/O pins that can be moved to
other locations with the use of the alternate pin function
register APFCON. To determine which pins can be
moved and what their default locations are upon a
Reset, see
Section 12.1 “Alternate Pin Function” for
more information.
TABLE 20-5: SUMMARY OF REGISTERS ASSOCIATED WITH STANDARD PWM
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
APFCON
— — — — — —
SSSEL CCP2SEL
108
CCP1CON
— — DC1B<1:0> CCP1M<3:0>
178
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF
76
PIE1
TMR1GIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE
77
PIE2
OSFIE — — — BCLIE — — CCP2IE
78
PIR1
TMR1GIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF
79
PIR2
OSFIF — — — BCLIF — —CCP2IF
80
PR2
Timer2 Period Register 165*
T2CON
— T2OUTPS<3:0> TMR2ON T2CKPS<1:0>
167
TMR2 Timer2 Module Register
165
TRISA
TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 110
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM.
* Page provides register information.