Datasheet

PIC16(L)F1516/7/8/9
DS40001452D-page 30  2010-2013 Microchip Technology Inc.
3.3.6 SPECIAL FUNCTION REGISTERS
SUMMARY
The Special Function registers are listed in Tab le 3-8
TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY
Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 0
00Ch PORTA PORTA Data Latch when written: PORTA pins when read xxxx xxxx uuuu uuuu
00Dh PORTB PORTB Data Latch when written: PORTB pins when read xxxx xxxx uuuu uuuu
00Eh PORTC PORTC Data Latch when written: PORTC pins when read xxxx xxxx uuuu uuuu
00Fh PORTD PORTD Data Latch when written: PORTD pins when read xxxx xxxx uuuu uuuu
010h PORTE
— — — —RE3RE2
(3)
RE1
(3)
RE0
(3)
---- xxxx ---- uuuu
011h PIR1 TMR1GIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
012h PIR2 OSFIF
— — —BCLIF— — CCP2IF 0--- 0--0 0--- 0--0
013h
— Unimplemented — —
014h
— Unimplemented — —
015h TMR0 Holding Register for the 8-bit Timer0 Count xxxx xxxx uuuu uuuu
016h TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Count xxxx xxxx uuuu uuuu
017h TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Count xxxx xxxx uuuu uuuu
018h T1CON TMR1CS<1:0> T1CKPS<1:0> T1OSCEN T1SYNC
—TMR1ON0000 00-0 uuuu uu-u
019h T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/
DONE
T1GVAL T1GSS<1:0> 0000 0x00 uuuu uxuu
01Ah TMR2 Timer 2 Module Register 0000 0000 0000 0000
01Bh PR2 Timer 2 Period Register 1111 1111 1111 1111
01Ch T2CON
— T2OUTPS<3:0> TMR2ON T2CKPS<1:0> -000 0000 -000 0000
01Dh
— Unimplemented — —
01Eh
— Unimplemented — —
01Fh
— Unimplemented — —
Bank 1
08Ch TRISA PORTA Data Direction Register 1111 1111 1111 1111
08Dh TRISB PORTB Data Direction Register 1111 1111 1111 1111
08Eh TRISC PORTC Data Direction Register 1111 1111 1111 1111
08Fh TRISD
(2)
PORTD Data Direction Register 1111 1111 1111 1111
090h TRISE
— — — — —
(3)
TRISE2
(2)
TRISE1
(2)
TRISE0
(2)
---- 1111 ---- 1111
091h PIE1 TMR1GIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
092h PIE2 OSFIE
— — —BCLIE— — CCP2IE 0--- 0--0 0--- 0--0
093h
— Unimplemented — —
094h
— Unimplemented — —
095h
OPTION_REG WPUEN INTEDG TMR0CS TMR0SE PSA PS<2:0> 1111 1111 1111 1111
096h PCON STKOVF STKUNF
—RWDTRMCLR RI POR BOR 00-1 11qq qq-q qquu
097h WDTCON
— — WDTPS<4:0> SWDTEN --01 0110 --01 0110
098h
— Unimplemented — —
099h OSCCON
—
IRCF<3:0>
—SCS<1:0>-011 1-00 -011 1-00
09Ah OSCSTAT SOSCR
—OSTSHFIOFR— — LFIOFR HFIOFS 0-q0 --00 q-qq --0q
09Bh ADRESL ADC Result Register Low xxxx xxxx uuuu uuuu
09Ch ADRESH ADC Result Register High xxxx xxxx uuuu uuuu
09Dh ADCON0
—CHS<4:0> GO/DONE ADON -000 0000 -000 0000
09Eh ADCON1 ADFM ADCS<2:0>
— — ADPREF<1:0> 0000 --00 0000 --00
09Fh
— Unimplemented — —
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: PIC16F1516/7/8/9 only.
2: PIC16(L)F1517/9 only.
3: Unimplemented, read as ‘1’.