Datasheet

PIC16(L)F1516/7/8/9
DS41452C-page 366  2010-2012 Microchip Technology Inc.
RC....................................................................... 51
XT .......................................................................49
Internal Modes ............................................................ 52
HFINTOSC.......................................................... 52
Internal Oscillator Clock Switch Timing............... 53
LFINTOSC .......................................................... 52
Clock Switching................................................................... 55
Code Examples
ADC Conversion ....................................................... 140
Changing Between Capture Prescalers.................... 170
Initializing PORTA.....................................................109
Writing to Flash Program Memory ............................100
Compare Module.
See Capture/Compare/PWM (CCP)
CONFIG1 Register.............................................................. 42
CONFIG2 Register.............................................................. 44
Core Function Register ....................................................... 29
Customer Change Notification Service ............................. 371
Customer Notification Service...........................................371
Customer Support ............................................................. 371
D
Data Memory....................................................................... 20
DC and AC Characteristics ............................................... 311
DC Characteristics
Extended and Industrial ............................................ 289
Industrial and Extended ............................................ 282
Development Support ....................................................... 343
Device Configuration........................................................... 41
Code Protection .......................................................... 45
Configuration Word ..................................................... 41
User ID..................................................................45, 46
Device ID Register .............................................................. 46
Device Overview ............................................................. 9, 87
E
Effects of Reset
PWM mode ............................................................... 177
Electrical Specifications ....................................................279
Enhanced Mid-range CPU .................................................. 15
Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART)............................... 233
Errata ....................................................................................8
EUSART............................................................................ 233
Associated Registers
Baud Rate Generator........................................ 247
Asynchronous Mode ................................................. 235
12-bit Break Transmit and Receive................... 254
Associated Registers
Receive..................................................... 241
Transmit.................................................... 237
Auto-Wake-up on Break....................................252
Baud Rate Generator (BRG)............................. 246
Clock Accuracy ................................................. 242
Receiver............................................................238
Setting up 9-bit Mode with Address Detect....... 240
Transmitter........................................................235
Baud Rate Generator (BRG)
Auto Baud Rate Detect ..................................... 251
Baud Rate Error, Calculating ............................ 246
Baud Rates, Asynchronous Modes................... 248
Formulas........................................................... 247
High Baud Rate Select (BRGH Bit)................... 246
Synchronous Master Mode ............................... 255, 259
Associated Registers
Receive..................................................... 258
Transmit.................................................... 256
Reception ......................................................... 257
Transmission .................................................... 255
Synchronous Slave Mode
Associated Registers
Receive .................................................... 260
Transmit.................................................... 259
Reception ......................................................... 260
Transmission .................................................... 259
Extended Instruction Set
ADDFSR................................................................... 269
F
Fail-Safe Clock Monitor ...................................................... 58
Fail-Safe Condition Clearing....................................... 58
Fail-Safe Detection ..................................................... 58
Fail-Safe Operation..................................................... 58
Reset or Wake-up from Sleep .................................... 58
Firmware Instructions ....................................................... 265
Fixed Voltage Reference (FVR)........................................ 131
Associated Registers................................................ 132
Flash Program Memory ...................................................... 91
Associated Registers................................................ 106
Configuration Word w/ Flash Program Memory........ 106
Erasing ....................................................................... 95
Modifying .................................................................. 101
Write Verify ............................................................... 103
Writing ........................................................................ 97
FSR Register ...................................................................... 29
FVRCON (Fixed Voltage Reference Control) Register..... 132
I
I
2
C Mode (MSSP)
Acknowledge Sequence Timing ............................... 218
Bus Collision
During a Repeated Start Condition................... 222
During a Stop Condition ................................... 223
Effects of a Reset ..................................................... 219
I
2
C Clock Rate w/BRG.............................................. 225
Master Mode
Operation.......................................................... 210
Reception ......................................................... 216
Start Condition Timing .............................. 212, 213
Transmission .................................................... 214
Multi-Master Communication, Bus Collision and
Arbitration ......................................................... 219
Multi-Master Mode.................................................... 219
Read/Write Bit Information (R/W
Bit)........................ 195
Slave Mode
Transmission .................................................... 200
Sleep Operation........................................................ 219
Stop Condition Timing .............................................. 218
INDF Register..................................................................... 29
Indirect Addressing ............................................................. 37
Instruction Format............................................................. 266
Instruction Set................................................................... 265
ADDLW..................................................................... 269
ADDWF..................................................................... 269
ADDWFC.................................................................. 269
ANDLW..................................................................... 269
ANDWF..................................................................... 269
BRA .......................................................................... 270
CALL......................................................................... 271
CALLW ..................................................................... 271
LSLF ......................................................................... 273
LSRF ........................................................................ 273
MOVF ....................................................................... 273