Datasheet

 2012 Microchip Technology Inc. Preliminary DS41624B-page 29
PIC16(L)F1512/3
Bank 14
70ch
to
710h
— Unimplemented — —
711h AADCON0
(3)
—CHS<4:0> GO/DONE ADON -000 0000 -000 0000
712h AADCON1
(3)
ADFM ADCS<2:0> — — ADPREF<1:0> 0000 --00 0000 --00
713h AADCON2
—TRIGSEL<2:0>— — — — -000 ---- -000 ----
714h AADCON3 ADEPPOL ADIPPOL ADOLEN ADOEN ADOOEN
— ADIPEN ADDSEN 0000 0-00 0000 0-00
715h AADSTAT
— — — — — ADCONV ADSTG<1:0> ---- -000 ---- -000
716h AADPRE
— ADPRE<6:0> -000 0000 -000 0000
717h AADACQ
— ADACQ<6:0> -000 0000 -000 0000
718h AADGRD GRDBOE GRDAOE GRDPOL
— — — — — 000- ---- 000- ----
719h AADCAP
— — — — — ADDCAP<2:0> ---- -000 ---- -000
71Ah AADRES0L
(3)
A/D Result 0 Register Low xxxx xxxx uuuu uuuu
71Bh AADRES0H
(3)
A/D Result 0 Register High xxxx xxxx uuuu uuuu
71Ch AADRES1L A/D Result 1 Register Low xxxx xxxx uuuu uuuu
71Dh AADRES1H A/D Result 1 Register High xxxx xxxx uuuu uuuu
71Eh
— Unimplemented — —
Bank 15-30
x0Ch
or
x8Ch
to
x1Fh
or
x9Fh
— Unimplemented — —
Bank 31
F8Ch
to
FE3h
— Unimplemented — —
FE4h STATUS_SHAD
— — — — —ZDCC---- -xxx ---- -uuu
FE5h WREG_SHAD Working Register Shadow xxxx xxxx uuuu uuuu
FE6h BSR_SHAD
— — — Bank Select Register Shadow ---x xxxx ---u uuuu
FE7h PCLATH_SHAD
— Program Counter Latch High Register Shadow -xxx xxxx uuuu uuuu
FE8h FSR0L_SHAD Indirect Data Memory Address 0 Low Pointer Shadow xxxx xxxx uuuu uuuu
FE9h FSR0H_SHAD Indirect Data Memory Address 0 High Pointer Shadow xxxx xxxx uuuu uuuu
FEAh FSR1L_SHAD Indirect Data Memory Address 1 Low Pointer Shadow xxxx xxxx uuuu uuuu
FEBh FSR1H_SHAD Indirect Data Memory Address 1 High Pointer Shadow xxxx xxxx uuuu uuuu
FECh
— Unimplemented — —
FEDh
STKPTR
— — — Current Stack Pointer ---1 1111 ---1 1111
FEEh
TOSL
Top of Stack Low Byte xxxx xxxx uuuu uuuu
FEFh
TOSH
— Top of Stack High Byte -xxx xxxx -uuu uuuu
TABLE 3-9: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: PIC16F1512/3 only.
2: Unimplemented, read as ‘1’.
3: This register is available in Bank 1 and Bank 14 under similar register names. See Section 16.5.1 “ADC Register Mapping”.