Datasheet

PIC16(L)F1512/3
DS41624B-page 24 Preliminary  2012 Microchip Technology Inc.
TABLE 3-6: PIC16(L)F1512/3 MEMORY
MAP (BANK 14)
Legend: = Unimplemented data memory locations,
read as ‘0’.
TABLE 3-7: PIC16(L)F1512/3 MEMORY
MAP (BANK 31)
Legend: = Unimplemented data memory locations,
read as ‘0’.
Bank 14
700h
70Bh
Core Registers
(Table 3-2)
70Ch
710h
Unimplemented
Read as ‘0’
711h
AADCON0
712h
AADCON1
713h
AADCON2
714h
AADCON3
715h
AADSTAT
716h
AADPRE
717h
AADACQ
718h
AADGRD
719h
AADCAP
71Ah
AADRES0L
71Bh
AADRES0H
71Ch
AADRES1L
71Dh
AADRES1H
71Eh
—
71Fh
—
720h
76Fh
Unimplemented
Read as ‘0’
770h
Common RAM
(Accesses
70h – 7Fh)
77Fh
Bank 31
F80h
F8Bh
Core Registers
(Table 3-2)
F8Ch
FE3h
Unimplemented
Read as ‘0’
FE4h
STATUS_SHAD
FE5h
WREG_SHAD
FE6h
BSR_SHAD
FE7h
PCLATH_SHAD
FE8h
FSR0L_SHAD
FE9h
FSR0H_SHAD
FEAh
FSR1L_SHAD
FEBh
FSR1H_SHAD
FECh
—
FEDh
STKPTR
FEEh
TOSL
FEFh
TOSH
FF0h
Common RAM
(Accesses
70h – 7Fh)
FFFh