Datasheet

 2012 Microchip Technology Inc. Preliminary DS41624B-page 229
PIC16(L)F1512/3
TABLE 20-3: SUMMARY OF REGISTERS ASSOCIATED WITH I
2
C™ OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values on
Page
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 72
PIE1
TMR1GIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 73
PIE2
OSFIE — — —BCLIE
—
— CCP2IE 74
PIR1
TMR1GIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF
75
PIR2
OSFIF
— — —
BCLIF
— —
CCP2IF 76
SSPADD ADD<7:0> 235
SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register 187*
SSPCON1 WCOL SSPOV SSPEN CKP SSPM<3:0> 232
SSPCON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 233
SSPCON3 ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN 234
SSPMSK MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0 235
SSPSTAT SMP CKE
D/A P S R/W UA BF 231
TRISA
TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 108
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by the MSSP module in I
2
C™ mode.
* Page provides register information.