Datasheet

PIC16(L)F1512/3
DS41624B-page 134 Preliminary  2012 Microchip Technology Inc.
16.2 ADC Operation
16.2.1 STARTING A CONVERSION
To enable the ADC module, the ADON bit of the
ADCON0 register must be set to a ‘1’. Setting the GO/
DONE
bit of the ADCON0 register to a ‘1’ will start the
Analog-to-Digital conversion.
16.2.2 COMPLETION OF A CONVERSION
When the conversion is complete, the ADC module will:
• Clear the GO/DONE
bit
• Set the ADIF Interrupt Flag bit
• Update the ADRESH and ADRESL registers with
new conversion result
16.2.3 TERMINATING A CONVERSION
If a conversion must be terminated before completion,
the GO/DONE
bit can be cleared in software. The
ADRESH and ADRESL registers will be updated with
the partially complete Analog-to-Digital conversion
sample. Incomplete bits will match the last bit
converted.
16.2.4 ADC OPERATION DURING SLEEP
The ADC module can operate during Sleep. This
requires the ADC clock source to be set to the F
RC
option. When the FRC clock source is selected, the
ADC waits one additional instruction before starting the
conversion. This allows the SLEEP instruction to be
executed, which can reduce system noise during the
conversion. If the ADC interrupt is enabled, the device
will wake-up from Sleep when the conversion
completes. If the ADC interrupt is disabled, the ADC
module is turned off after the conversion completes,
although the ADON bit remains set.
When the ADC clock source is something other than
F
RC, a SLEEP instruction causes the present
conversion to be aborted and the ADC module is
turned off, although the ADON bit remains set.
16.2.5 SPECIAL EVENT TRIGGER
The Special Event Trigger allows periodic ADC
measurements without software intervention, using the
TRIGSEL bits of the AADCON2 register. When this
trigger occurs, the GO/DONE
bit is set by hardware
from one of the following sources:
• CCP1
• CCP2
• Timer0 Overflow
• Timer1 Overflow
• Timer2 Match to PR2
Using the Special Event Trigger does not assure proper
ADC timing. It is the user’s responsibility to ensure that
the ADC timing requirements are met.
Refer to
Section 21.0 “Capture/Compare/PWM
Modules”
, Section 17.0 “Timer0 Module”,
Section 18.0 “Timer1 Module with Gate Control”, and
Section 19.0 “Timer2 Module” for more information.
Note: The GO/DONE bit should not be set in the
same instruction that turns on the ADC.
Refer to
Section 16.2.6 “A/D Conver-
sion Procedure”
.
Note: A device Reset forces all registers to their
Reset state. Thus, the ADC module is
turned off and any pending conversion is
terminated.
TABLE 16-2: SPECIAL EVENT TRIGGER
Device Source
PIC16(L)F1512/3 CCP1, CCP2, TMR0, TMR1,
TMR2