Datasheet

PIC16(L)F1512/3
DS41624B-page 156 Preliminary 2012 Microchip Technology Inc.
REGISTER 16-10: AADCON3: A/D CONTROL REGISTER 3
R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 U-0 R/W-0/0 R/W-0/0
ADEPPOL ADIPPOL ADOLEN ADOEN ADOOEN
ADIPEN ADDSEN
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7
ADEPPOL: External Pre-charge Polarity bit
(1)
1 = Selected channel is shorted to VDDIO during pre-charge time
0 = Selected channel is shorted to V
SS during pre-charge time
bit 6
ADIPPOL: Internal Pre-charge Polarity bit
(1)
1 =CHOLD is shorted to VREFH during pre-charge time
0 =C
HOLD is shorted to VREFL during pre-charge time
bit 5
ADOLEN: ADOUT Low-Impedance Output Enable bit
1 = ADOUT pin low-impedance connection to ADC bus
0 = No external connection to ADC bus
bit 4
ADOEN: ADOUT Output Enable bit
1 = ADOUT pin is connected to ADC bus (normal passgate)
0 = No external connection to ADC bus
bit 3
ADOOEN: ADOUT Override Enable bit
1 = ADOUT pin is overridden during pre-charge with internal polarity value
0 = ADOUT pin is not overridden
bit 2 Unimplemented: Read as0
bit 1
ADIPEN: A/D Invert Polarity Enable bit
If ADDSEN =
1:
1 = The output value of the ADEPPOL, ADIPPOL, and GRDPOL bits used by the A/D are inverted for
the second conversion
0 = The second A/D conversion proceeds like the first
If ADDSEN =
0:
This bit has no effect.
bit 0
ADDSEN: A/D Double Sample Enable bit
1 = The A/D immediately starts a new conversion after completing a conversion.
GO/DONE
bit is not automatically clear at end of conversion
0 = A/D operates in the traditional, single conversion mode
Note 1: When the ADDSEN = 1 and ADIPEN = 1; the polarity of this output is inverted for the second conversion
time. The stored bit value does not change.