Datasheet

PIC16(L)F1508/9
DS40001609B-page 414  2011-2013 Microchip Technology Inc.
ADC Conversion .......................................................342
Asynchronous Reception .......................................... 242
Asynchronous Transmission..................................... 238
Asynchronous Transmission (Back to Back) ............ 238
Auto Wake-up Bit (WUE) During Normal Operation . 255
Auto Wake-up Bit (WUE) During Sleep .................... 255
Automatic Baud Rate Calibration.............................. 253
Baud Rate Generator with Clock Arbitration ............. 212
BRG Reset Due to SDA Arbitration During Start
Condition........................................................... 223
Brown-Out Reset (BOR) ........................................... 337
Brown-out Reset Situations ........................................ 65
Bus Collision During a Repeated Start Condition
(Case 1) ............................................................ 224
Bus Collision During a Repeated Start Condition
(Case 2) ............................................................ 224
Bus Collision During a Start Condition (SCL = 0) .....223
Bus Collision During a Stop Condition (Case 1) ....... 225
Bus Collision During a Stop Condition (Case 2) ....... 225
Bus Collision During Start Condition (SDA only) ...... 222
Bus Collision for Transmit and Acknowledge............ 221
CLC Propagation Timing........................................... 340
CLKOUT and I/O....................................................... 336
Clock Synchronization .............................................. 209
Clock Timing .............................................................333
Comparator Output ...................................................152
Fail-Safe Clock Monitor (FSCM) ................................. 59
First Start Bit Timing ................................................. 213
I
2
C Bus Data............................................................. 348
I
2
C Bus Start/Stop Bits..............................................348
I
2
C Master Mode (7 or 10-Bit Transmission) ............ 216
I
2
C Master Mode (7-Bit Reception)........................... 218
I
2
C Stop Condition Receive or Transmit Mode ......... 220
INT Pin Interrupt.......................................................... 74
Internal Oscillator Switch Timing.................................54
Repeat Start Condition.............................................. 214
Reset Start-up Sequence............................................ 67
Reset, WDT, OST and Power-up Timer ................... 337
Send Break Character Sequence ............................. 256
SPI Master Mode (CKE = 1, SMP = 1) ..................... 345
SPI Mode (Master Mode).......................................... 186
SPI Slave Mode (CKE = 0) ....................................... 346
SPI Slave Mode (CKE = 1) ....................................... 346
Synchronous Reception (Master Mode, SREN) .......260
Synchronous Transmission....................................... 258
Synchronous Transmission (Through TXEN) ........... 258
T2_match .................................................................. 176
Timer0 and Timer1 External Clock ........................... 339
Timer1 Incrementing Edge........................................ 167
Timer2.......................................................................175
Two-Speed Start-up.................................................... 57
USART Synchronous Receive (Master/Slave) ......... 344
USART Synchronous Transmission (Master/Slave) . 344
Wake-up from Interrupt ............................................... 86
Timing Parameter Symbology........................................... 333
Timing Requirements
I
2
C Bus Data............................................................. 349
I2C Bus Start/Stop Bits .............................................348
SPI Mode ..................................................................347
TMR0 Register....................................................................27
TMR1H Register .................................................................27
TMR1L Register..................................................................27
TMR2 Register....................................................................27
TRIS..................................................................................320
TRISA Register ........................................................... 27, 112
TRISB Register........................................................... 27, 116
TRISC............................................................................... 119
TRISC Register........................................................... 27, 120
Two-Speed Clock Start-up Mode........................................ 56
TXREG ............................................................................. 237
TXREG Register................................................................. 28
TXSTA Register.......................................................... 28, 245
BRGH Bit .................................................................. 248
U
USART
Synchronous Master Mode
Requirements, Synchronous Receive .............. 344
Requirements, Synchronous Transmission...... 344
Timing Diagram, Synchronous Receive ........... 344
Timing Diagram, Synchronous Transmission... 344
V
VREF. SEE ADC Reference Voltage
VREGCON Register ........................................................... 87
W
Wake-up on Break ............................................................ 254
Wake-up Using Interrupts ................................................... 85
Watchdog Timer ................................................................. 89
Watchdog Timer (WDT)...................................................... 66
Associated Registers.................................................. 92
Modes......................................................................... 90
Specifications ........................................................... 338
WCOL ....................................................... 212, 215, 217, 219
WCOL Status Flag.................................... 212, 215, 217, 219
WDTCON Register ............................................................. 91
WPUA Register................................................................. 114
WPUB Register................................................................. 118
Write Protection .................................................................. 45
WWW Address ................................................................. 415
WWW, On-Line Support ................................................... 2, 6