Datasheet
PIC16(L)F1508/9
DS40001609B-page 410 2011-2013 Microchip Technology Inc.
Code Examples
ADC Conversion .......................................................138
Initializing PORTA..................................................... 111
Writing to Flash Program Memory ............................ 102
Comparator
Associated Registers ................................................ 157
Operation ..................................................................151
Comparator Module .......................................................... 151
Cx Output State Versus Input Conditions ................. 153
Comparator Specifications................................................ 343
Comparators
C2OUT as T1 Gate ...................................................165
Complementary Waveform Generator (CWG) .......... 293, 294
CONFIG1 Register.............................................................. 42
CONFIG2 Register.............................................................. 44
Core Function Register ....................................................... 26
Customer Change Notification Service ............................. 415
Customer Notification Service...........................................415
Customer Support ............................................................. 415
CWG
Auto-shutdown Control .............................................297
Clock Source............................................................. 293
Output Control...........................................................293
Selectable Input Sources .......................................... 293
CWGxCON0 Register ....................................................... 300
CWGxCON1 Register ....................................................... 301
CWGxCON2 Register ....................................................... 302
CWGxDBF Register.......................................................... 303
CWGxDBR Register..........................................................303
D
DACxCON0 (Digital-to-Analog Converter Control 0)
Register.....................................................................149
DACxCON1 (Digital-to-Analog Converter Control 1)
Register.....................................................................149
Data Memory....................................................................... 18
DC and AC Characteristics ...............................................351
DC Characteristics
Extended and Industrial ............................................ 330
Industrial and Extended ............................................ 323
Development Support ....................................................... 393
Device Configuration........................................................... 41
Code Protection .......................................................... 45
Configuration Word .....................................................41
User ID..................................................................45, 46
Device ID Register ..............................................................46
Device Overview .............................................................7, 89
Digital-to-Analog Converter (DAC).................................... 147
Associated Registers ................................................ 149
Effects of a Reset...................................................... 147
Specifications............................................................343
E
Effects of Reset
PWM mode ...............................................................265
Electrical Specifications .................................................... 321
Enhanced Mid-Range CPU................................................. 13
Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART)...............................235
Errata .................................................................................... 6
EUSART............................................................................ 235
Associated Registers
Baud Rate Generator........................................ 249
Asynchronous Mode ................................................. 237
12-bit Break Transmit and Receive................... 256
Associated Registers
Receive .................................................... 243
Transmit.................................................... 239
Auto-Wake-up on Break ................................... 254
Baud Rate Generator (BRG) ............................ 248
Clock Accuracy................................................. 244
Receiver ........................................................... 240
Setting up 9-bit Mode with Address Detect ...... 242
Transmitter ....................................................... 237
Baud Rate Generator (BRG)
Auto Baud Rate Detect..................................... 253
Baud Rate Error, Calculating............................ 248
Baud Rates, Asynchronous Modes .................. 250
Formulas........................................................... 249
High Baud Rate Select (BRGH Bit) .................. 248
Synchronous Master Mode............................... 257, 261
Associated Registers
Receive .................................................... 260
Transmit.................................................... 258
Reception ......................................................... 259
Transmission .................................................... 257
Synchronous Slave Mode
Associated Registers
Receive .................................................... 262
Transmit.................................................... 261
Reception ......................................................... 262
Transmission .................................................... 261
F
Fail-Safe Clock Monitor ...................................................... 58
Fail-Safe Condition Clearing....................................... 58
Fail-Safe Detection ..................................................... 58
Fail-Safe Operation..................................................... 58
Reset or Wake-up from Sleep .................................... 59
Firmware Instructions ....................................................... 307
Fixed Voltage Reference (FVR)........................................ 129
Associated Registers................................................ 130
Flash Program Memory ...................................................... 93
Associated Registers................................................ 108
Configuration Word w/ Flash Program Memory........ 108
Erasing ....................................................................... 97
Modifying .................................................................. 103
Write Verify ............................................................... 105
Writing ........................................................................ 99
FSR Register ...................................................................... 26
FVRCON (Fixed Voltage Reference Control) Register..... 130
I
I
2
C Mode (MSSPx)
Acknowledge Sequence Timing ............................... 219
Bus Collision
During a Repeated Start Condition................... 224
During a Stop Condition ................................... 225
Effects of a Reset ..................................................... 220
I
2
C Clock Rate w/BRG.............................................. 227
Master Mode
Operation.......................................................... 211
Reception ......................................................... 217
Start Condition Timing .............................. 213, 214
Transmission .................................................... 215
Multi-Master Communication, Bus Collision and
Arbitration ......................................................... 220
Multi-Master Mode.................................................... 220
Read/Write Bit Information (R/W
Bit)........................ 195
Slave Mode
Transmission .................................................... 201
Sleep Operation........................................................ 220