Datasheet
PIC16(L)F1508/9
DS40001609B-page 226 2011-2013 Microchip Technology Inc.
TABLE 21-3: SUMMARY OF REGISTERS ASSOCIATED WITH I
2
C™ OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values on
Page:
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF 76
PIE1
TMR1GIE ADIE RCIE TXIE
SSP1IE
— TMR2IE TMR1IE 77
PIE2
OSFIE
C2IE C1IE
—
BCL1IE
NCO1IE — — 78
PIR1
TMR1GIF ADIF RCIF TXIF
SSP1IF
—
TMR2IF TMR1IF 80
PIR2
OSFIF
C2IF C1IF
—
BCL1IF
NCO1IF
— — 81
TRISA
— —
TRISA5
TRISA4
—
(1)
TRISA2 TRISA1 TRISA0 112
SSP1ADD ADD<7:0> 233
SSP1BUF MSSP Receive Buffer/Transmit Register 183*
SSP1CON1 WCOL SSPOV SSPEN CKP SSPM<3:0> 230
SSP1CON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 231
SSP1CON3 ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN 232
SSP1MSK MSK<7:0> 233
SSP1STAT
SMP CKE D/A
PSR/WUA BF 228
Legend: — = unimplemented location, read as ‘
0’. Shaded cells are not used by the MSSP module in I
2
C™ mode.
* Page provides register information.
Note 1: Unimplemented, read as ‘
1’.