Datasheet

 2011 Microchip Technology Inc. Preliminary DS41586A-page 76
PIC16(L)F1507
Even if the flag bits were checked before executing a
SLEEP instruction, it may be possible for flag bits to
become set before the SLEEP instruction completes. To
determine whether a SLEEP instruction executed, test
the PD
bit. If the PD bit is set, the SLEEP instruction
was executed as a NOP.
FIGURE 8-1: WAKE-UP FROM SLEEP THROUGH INTERRUPT
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
CLKIN
(1)
CLKOUT
(2)
Interrupt flag
GIE bit
(INTCON reg.)
Instruction Flow
PC
Instruction
Fetched
Instruction
Executed
PC PC + 1 PC + 2
Inst(PC) = Sleep
Inst(PC - 1)
Inst(PC + 1)
Sleep
Processor in
Sleep
Interrupt Latency
(4)
Inst(PC + 2)
Inst(PC + 1)
Inst(0004h)
Inst(0005h)
Inst(0004h)
Forced NOP
PC + 2 0004h 0005h
Forced NOP
T1
OSC
(3)
PC + 2
Note 1: External clock. High, Medium, Low mode assumed.
2: CLKOUT is shown here for timing reference.
3: T1OSC; See Section 25.0 “Electrical Specifications”.
4: GIE = 1 assumed. In this case after wake-up, the processor calls the ISR at 0004h. If GIE = 0, execution will continue in-line.