Datasheet

PIC16(L)F1507

DS41586A-page 171 Preliminary  2011 Microchip Technology Inc.

R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u

LCxG1D4T LCxG1D4N LCxG1D3T LCxG1D3N LCxG1D2T LCxG1D2N LCxG1D1T LCxG1D1N

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set ‘0’ = Bit is cleared

bit 7 LCxG1D4T: Gate 1 Data 4 True (non-inverted) bit

1 = lcxd4T is gated into lcxg1

0 = lcxd4T is not gated into lcxg1

bit 6 LCxG1D4N: Gate 1 Data 4 Negated (inverted) bit

1 = lcxd4N is gated into lcxg1

0 = lcxd4N is not gated into lcxg1

bit 5 LCxG1D3T: Gate 1 Data 3 True (non-inverted) bit

1 = lcxd3T is gated into lcxg1

0 = lcxd3T is not gated into lcxg1

bit 4 LCxG1D3N: Gate 1 Data 3 Negated (inverted) bit

1 = lcxd3N is gated into lcxg1

0 = lcxd3N is not gated into lcxg1

bit 3 LCxG1D2T: Gate 1 Data 2 True (non-inverted) bit

1 = lcxd2T is gated into lcxg1

0 = lcxd2T is not gated into lcxg1

bit 2 LCxG1D2N: Gate 1 Data 2 Negated (inverted) bit

1 = lcxd2N is gated into lcxg1

0 = lcxd2N is not gated into lcxg1

bit 1 LCxG1D1T: Gate 1 Data 1 True (non-inverted) bit

1 = lcxd1T is gated into lcxg1

0 = lcxd1T is not gated into lcxg1

bit 0 LCxG1D1N: Gate 1 Data 1 Negated (inverted) bit

1 = lcxd1N is gated into lcxg1

0 = lcxd1N is not gated into lcxg1