Datasheet

 2011 Microchip Technology Inc. Preliminary DS41586A-page 168

PIC16(L)F1507

R/W-0/0 U-0 U-0 U-0 R/W-x/u R/W-x/u R/W-x/u R/W-x/u

LCxPOL — — — LCxG4POL LCxG3POL LCxG2POL LCxG1POL

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set ‘0’ = Bit is cleared

bit 7 LCxPOL: LCOUT Polarity Control bit

1 = The output of the logic cell is inverted

0 = The output of the logic cell is not inverted

bit 6-4 Unimplemented: Read as ‘0’

bit 3 LCxG4POL: Gate 4 Output Polarity Control bit

1 = The output of gate 4 is inverted when applied to the logic cell

0 = The output of gate 4 is not inverted

bit 2 LCxG3POL: Gate 3 Output Polarity Control bit

1 = The output of gate 3 is inverted when applied to the logic cell

0 = The output of gate 3 is not inverted

bit 1 LCxG2POL: Gate 2 Output Polarity Control bit

1 = The output of gate 2 is inverted when applied to the logic cell

0 = The output of gate 2 is not inverted

bit 0 LCxG1POL: Gate 1 Output Polarity Control bit

1 = The output of gate 1 is inverted when applied to the logic cell

0 = The output of gate 1 is not inverted