Datasheet
PIC16(L)F1507
DS41586A-page 155 Preliminary 2011 Microchip Technology Inc.
19.0 PULSE WIDTH MODULATION
(PWM) MODULE
The PWM module generates a Pulse-Width Modulated
signal determined by the duty cycle, period, and reso-
lution that are configured by the following registers:
•PR2
•T2CON
• PWMxDCH
• PWMxDCL
•PWMxCON
Figure 19-2 shows a simplified block diagram of PWM
operation.
Figure 19-1 shows a typical waveform of the PWM
signal.
For a step-by-step procedure on how to set up this
module for PWM operation, refer to Section 19.1.9
“Setup for PWM Operation using PWMx Pins”.
FIGURE 19-1: PWM OUTPUT
FIGURE 19-2: SIMPLIFIED PWM BLOCK DIAGRAM
Period
Pulse Width
TMR2 = 0
TMR2 =
TMR2 = PR2
PWMxDCH<7:0>:PWMxDCL<7:6>
PWMxDCH
Comparator
TMR2
Comparator
PR2
(1)
R
Q
S
Duty Cycle registers
PWMxDCL<7:6>
Clear Timer,
PWMx pin and
latch Duty Cycle
Note 1: 8-bit timer is concatenated with the two Least Significant bits of 1/FOSC adjusted by
the Timer2 prescaler to create a 10-bit time base.
Latched
(Not visible to user)
Q
Output Polarity (PWMxPOL)
TMR2 Module
0
1
PWMxOUT
to other peripherals: CLC and CWG
PWMx
Output Enable (PWMxOE)
TRIS Control