Datasheet

 2011 Microchip Technology Inc. Preliminary DS41607A-page 5
PIC16(L)F1503
FIGURE 2: 16-PIN QFN DIAGRAM FOR PIC16(L)F1503
TABLE 1: 14-PIN ALLOCATION TABLE (PIC16(L)F1503)
I/O
14-Pin PDIP/SOIC/TSSOP
16-Pin QFN
ADC
Reference
Comparator
Timer
CWG
NCO
CLC
PWM
MSSP
Interrupt
Basic
RA0 13 12 AN0 DACOUT1 C1IN+ — — — — — — IOC ICSPDAT
RA1 12 11 AN1 VREF+ C1IN0-
C2IN0-
— — — — — — IOC ICSPCLK
RA2 11 10 AN2 DACOUT2 C1OUT T0CKI CWG1FLT — CLC1
(1)
PWM3 — INT
IOC
—
RA3 4 3 — — — T1G
(2)
— — CLC1IN0 — SS
(2)
IOC MCLR
VPP
RA4 3 2 AN3 — — T1G
(1)
— NCO1
(2)
— — SDO
(2)
IOC CLKOUT
RA5 2 1 — — — T1CKI — NCO1CLK CLC1IN1 — — IOC CLKIN
RC0 10 9 AN4 — C2IN+ — — — CLC2 — SCL
SCK
— —
RC1 9 8 AN5 — C1IN1-
C2IN1-
— — NCO1
(1)
— PWM4 SDA
SDI
— —
RC2 8 7 AN6 — C1IN2-
C2IN2-
— — — — — SDO
(1)
— —
RC3 7 6 AN7 — C1IN3-
C2IN3-
— — — CLC2IN0 PWM2 SS
(1)
— —
RC4 6 5 — — C2OUT — CWG1B — CLC2IN1 — — — —
RC5 5 4 — — — — CWG1A — CLC1
(2)
PWM1 — — —
VDD 1 16 — — — — — — — — — — VDD
VSS 14 13 — — — — — — — — — — VSS
Note 1: Default location for peripheral pin function. Alternate location can be selected using the APFCON register.
2: Alternate location for peripheral pin function selected by the APFCON register.
Note: See Table 1 for location of all peripheral functions.
-
78
2
3
1
11
12
5
9
10
13141516
6
4
RA5
RA4
MCLR/VPP/RA3
RC4
RC3
RC1
RC2
RC0
RA0/ICSPDAT
RA2
RA1/ICSPCLK
Vss
VDD
NC
RC5
NC
PIC16(L)F1503
QFN (3x3)