Datasheet

 2011 Microchip Technology Inc. Preliminary DS41607A-page 335
PIC16(L)F1503
T
T1CON Register ......................................................... 25, 156
T1GCON Register............................................................. 157
T2CON (Timer2) Register................................................. 162
T2CON Register ................................................................. 25
Temperature Indicator
Associated Registers ................................................ 116
Temperature Indicator Module.......................................... 115
Thermal Considerations.................................................... 295
Timer0............................................................................... 144
Associated Registers ................................................ 146
Operation .................................................................. 144
Specifications............................................................ 301
Timer1............................................................................... 148
Associated registers.................................................. 158
Asynchronous Counter Mode ................................... 150
Reading and Writing ......................................... 150
Clock Source Selection............................................. 149
Interrupt..................................................................... 152
Operation .................................................................. 149
Operation During Sleep ............................................ 152
Prescaler................................................................... 150
Specifications............................................................ 301
Timer1 Gate
Selecting Source............................................... 150
TMR1H Register ....................................................... 148
TMR1L Register........................................................ 148
Timer2............................................................................... 160
Associated registers.................................................. 163
Timers
Timer1
T1CON.............................................................. 156
T1GCON........................................................... 157
Timer2
T2CON.............................................................. 162
Timing Diagrams
A/D Conversion......................................................... 302
A/D Conversion (Sleep Mode) .................................. 303
Acknowledge Sequence ........................................... 203
Baud Rate Generator with Clock Arbitration ............. 196
BRG Reset Due to SDA Arbitration During
Start Condition .................................................. 207
Brown-out Reset (BOR) ............................................ 299
Brown-out Reset Situations ........................................ 55
Bus Collision During a Repeated Start Condition
(Case 1) ............................................................ 208
Bus Collision During a Repeated Start Condition
(Case 2) ............................................................ 208
Bus Collision During a Start Condition (SCL = 0) ..... 207
Bus Collision During a Stop Condition (Case 1) ....... 209
Bus Collision During a Stop Condition (Case 2) ....... 209
Bus Collision During Start Condition (SDA only) ...... 206
Bus Collision for Transmit and Acknowledge............ 205
CLKOUT and I/O....................................................... 298
Clock Synchronization .............................................. 193
Clock Timing ............................................................. 297
Comparator Output ................................................... 135
First Start Bit Timing ................................................. 197
I
2
C Bus Data............................................................. 308
I
2
C Bus Start/Stop Bits.............................................. 307
I
2
C Master Mode (7 or 10-Bit Transmission) ............ 200
I
2
C Master Mode (7-Bit Reception)........................... 202
I
2
C Stop Condition Receive or Transmit Mode ......... 204
INT Pin Interrupt.......................................................... 64
Internal Oscillator Switch Timing................................. 49
Repeat Start Condition ............................................. 198
Reset Start-up Sequence ........................................... 57
Reset, WDT, OST and Power-up Timer ................... 299
SPI Master Mode (CKE = 1, SMP = 1) ..................... 305
SPI Mode (Master Mode) ......................................... 170
SPI Slave Mode (CKE = 0)....................................... 306
SPI Slave Mode (CKE = 1)....................................... 306
Timer0 and Timer1 External Clock ........................... 300
Timer1 Incrementing Edge ....................................... 152
Wake-up from Interrupt............................................... 76
Timing Parameter Symbology .......................................... 296
Timing Requirements
I
2
C Bus Data............................................................. 309
I2C Bus Start/Stop Bits............................................. 308
SPI Mode.................................................................. 307
TMR0 Register.................................................................... 25
TMR1H Register................................................................. 25
TMR1L Register.................................................................. 25
TMR2 Register.................................................................... 25
TRIS ................................................................................. 283
TRISA Register........................................................... 25, 102
TRISC............................................................................... 105
TRISC Register........................................................... 25, 106
V
VREF. SEE ADC Reference Voltage
VREGCON Register ........................................................... 78
W
Wake-up Using Interrupts................................................... 75
Watchdog Timer (WDT)...................................................... 56
Associated Registers.................................................. 82
Modes......................................................................... 80
Specifications ........................................................... 300
WCOL....................................................... 196, 199, 201, 203
WCOL Status Flag.................................... 196, 199, 201, 203
WDTCON Register ............................................................. 81
WPUA Register................................................................. 104
WPUC Register ................................................................ 107
Write Protection .................................................................. 42
WWW Address ................................................................. 337
WWW, On-Line Support ....................................................... 7