Datasheet
PIC16(L)F1503
DS41607A-page 210 Preliminary 2011 Microchip Technology Inc.
TABLE 21-3: SUMMARY OF REGISTERS ASSOCIATED WITH I
2
C™ OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values on
Page:
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 66
PIE1
TMR1GIE ADIE — —
SSP1IE
— TMR2IE TMR1IE 67
PIE2
—
C2IE C1IE
—
BCLIE
NCO1IE — — 68
PIR1
TMR1GIF ADIF — —
SSP1IF
—
TMR2IF TMR1IF 70
PIR2
—
C2IF C1IF
—
BCL1IF
NCO1IF
— — 71
TRISA
— —
TRISA5
TRISA4 —
(1)
TRISA2 TRISA1 TRISA0 102
SSPADD ADD<7:0> 216
SSPBUF MSSPx Receive Buffer/Transmit Register 168*
SSPCON1 WCOL SSPOV SSPEN CKP SSPM<3:0> 213
SSPCON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 214
SSPCON3 ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN 215
SSPMSK MSK<7:0> 216
SSPSTAT
SMP CKE D/A
PSR/WUA BF 212
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by the MSSP module in I
2
C™ mode.
* Page provides register information.
Note 1: Unimplemented, read as ‘1’.