Datasheet

2011 Microchip Technology Inc. Preliminary DS41607A-page 11
PIC16(L)F1503
TABLE 1-2: PIC16(L)F1503 PINOUT DESCRIPTION
Name Function
Input
Type
Output
Type
Description
RA0/AN0/C1IN+/DACOUT1/
ICSPDAT
RA0 TTL CMOS General purpose I/O.
AN0 AN A/D Channel input.
C1IN+ AN Comparator C1 positive input.
DACOUT1 AN Digital-to-Analog Converter output.
ICSPDAT ST CMOS ICSP™ Data I/O.
RA1/AN1/V
REF+/C1IN0-/C2IN0-/
ICSPCLK
RA1 TTL CMOS General purpose I/O.
AN1 AN A/D Channel input.
V
REF+ AN A/D Positive Voltage Reference input.
C1IN0- AN Comparator C1 negative input.
C2IN0- AN Comparator C2 negative input.
ICSPCLK ST Serial Programming Clock.
RA2/AN2/C1OUT/DACOUT2/
T0CKI/INT/PWM3/CLC1
(1)
/
CWG1FLT
RA2 ST CMOS General purpose I/O.
AN2 AN A/D Channel input.
C1OUT CMOS Comparator C1 output.
DACOUT2 AN Digital-to-Analog Converter output.
T0CKI ST Timer0 clock input.
INT ST External interrupt.
PWM3 CMOS Pulse Width Module source output.
CLC1 CMOS Configurable Logic Cell source output.
CWG1FLT
ST Complementary Waveform Generator Fault input.
RA3/CLC1IN0/V
PP/T1G
(2)
/SS
(2)
/
MCLR
RA3 TTL General purpose input.
CLC1IN0 ST Configurable Logic Cell source input.
V
PP HV Programming voltage.
T1G ST Timer1 Gate input.
SS
ST Slave Select input.
MCLR
ST Master Clear with internal pull-up.
RA4/AN3/NCO1
(2)
/SDO
(2)
/
CLKOUT/T1G
(1)
RA4 TTL CMOS General purpose I/O.
AN3 AN A/D Channel input.
NCO1 CMOS Numerically Controlled Oscillator output.
SDO CMOS SPI data output.
CLKOUT CMOS F
OSC/4 output.
T1G ST Timer1 Gate input.
RA5/CLKIN/T1CKI/NCO1CLK/
CLC1IN1
RA5 TTL CMOS General purpose I/O.
CLKIN CMOS External clock input (EC mode).
T1CKI ST Timer1 clock input.
NCO1CLK ST Numerically Controlled Oscillator Clock source input.
CLC1IN1
ST
CLC1 input.
Legend: AN = Analog input or output CMOS= CMOS compatible input or output OD = Open Drain
TTL = TTL compatible input ST = Schmitt Trigger input with CMOS levels I
2
C™ = Schmitt Trigger input with I
2
C
HV = High Voltage XTAL = Crystal levels
Note 1: Default location for peripheral pin function. Alternate location can be selected using the APFCON register.
2: Alternate location for peripheral pin function selected by the APFCON register.