Datasheet

PIC16(L)F1454/5/9
DS41639A-page 78 Preliminary 2012 Microchip Technology Inc.
TABLE 5-4: SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
TABLE 5-5: SUMMARY OF CONFIGURATION WORD WITH CLOCK SOURCES
REGISTER 5-4: ACTCON: ACTIVE CLOCK TUNING (ACT) CONTROL REGISTER
R/W-0/0 R/W-0/0 U-0 R/W-0/0 R-0/0 U-0 R-0/0 U-0
ACTEN ACTUD
—ACTSRC
(1)
ACTLOCK —ACTORS
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7 ACTEN: Active Clock Tuning Selection bit
1 = ACT is enabled, updates to OSCTUNE are exclusive to the ACT
0 = ACT is disabled
bit 6 ACTUD: Active Clock Tuning Update Disable bit
1 = Updates to the OSCTUNE register from ACT are disabled
0 = Updates to the OSCTUNE register from ACT are enabled
bit 5 Unimplemented: Read as0
bit 4 ACTSRC: Active Clock Tuning Source Selection bit
1 = The HFINTOSC oscillator is tuned using Fll-speed USB events
0 = The HFINTOSC oscillator is tuned using the 32.768 kHz oscillator (SOSC) clock source
bit 3 ACTLOCK: Active Clock Tuning Lock Status bit
1 = Locked; 16 MHz internal oscillator is within ± 0.20%.Locked
0 = Not locked; 16 MHz internal oscillator tuning has not stabilized within ± 0.20%
bit 2 Unimplemented: Read as0
bit 1 ACTORS: Active Clock Tuning Out-of-Range Status bit
1 = Out-of-range; oscillator frequency is outside of the OSCTUNE range
0 = In-range; oscillator frequency is within the OSCTUNE range
bit 0 Unimplemented: Read as0
Note 1: The ACTSRC bit should only be changed when ACTEN = 0.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ACTCON
ACTEN ACTUD
ACTSRC ACTLOCK —ACTORS
75
OSCCON SPLLEN SPLLMULT IRCF<3:0> SCS<1:0> 75
OSCSTAT SOSCR PLLRDY OSTS HFIOFR
LFIOFR HFIOFS 76
OSCTUNE
TUNE<6:0> 77
PIR2
OSFIF
C2IF C1IF BCL1IF USBIF ACTIF
98
PIE2
OSFIE
C2IE C1IE BCL1IE USBIE ACTIE
100
T1CON
TMR1CS<1:0> T1CKPS<1:0> T1OSCEN T1SYNC TMR1ON
195
Legend: — = unimplemented location, read as
0’. Shaded cells are not used by clock sources.
Name Bits Bit -/7 Bit -/6 Bit 13/5 Bit 12/4 Bit 11/3 Bit 10/2 Bit 9/1 Bit 8/0
Register
on Page
CONFIG1
13:8
FCMEN IESO CLKOUTEN BOREN<1:0>
52
7:0 CP MCLRE PWRTE WDTE<1:0> FOSC<2:0>
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by clock sources.