Datasheet
PIC16(L)F1454/5/9
DS41639A-page 76 Preliminary 2012 Microchip Technology Inc.
REGISTER 5-2: OSCSTAT: OSCILLATOR STATUS REGISTER
R-1/q R-0/q R-q/q R-0/q U-0 U-0 R-0/q R-0/q
SOSCR PLLRDY OSTS HFIOFR
— —
LFIOFR HFIOFS
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared q = Conditional
bit 7 SOSCR: Secondary Oscillator Ready bit
If T1OSCEN =
1:
1 = Secondary oscillator is ready
0 = Secondary oscillator is not ready
If T1OSCEN = 0:
1 = Timer1 clock source is always ready
bit 6 PLLRDY: PLL Ready bit
1 = PLL is ready
0 = PLL is not ready
bit 5 OSTS: Oscillator Start-up Timer Status bit
1 = Running from the clock defined by the FOSC<2:0> bits of the Configuration Words
0 = Running from an internal oscillator (FOSC<2:0> = 100)
bit 4 HFIOFR: High-Frequency Internal Oscillator Ready bit
1 = HFINTOSC is ready
0 = HFINTOSC is not ready
bit 3-2 Unimplemented: Read as ‘0’
bit 1 LFIOFR: Low-Frequency Internal Oscillator Ready bit
1 = LFINTOSC is ready
0 = LFINTOSC is not ready
bit 0 HFIOFS: High-Frequency Internal Oscillator Stable bit
1 = HFINTOSC 16 MHz Oscillator is stable and is driving the INTOSC
0 = HFINTOSC 16 MHz is not stable, the Start-up Oscillator is driving INTOSC