Datasheet

 2012 Microchip Technology Inc. Preliminary DS41639A-page 43
PIC16(L)F1454/5/9
Bank 31
F8Ch
—
FE3h
— Unimplemented — —
FE4h STATUS_
SHAD
— — — — — Z_SHAD DC_SHAD C_SHAD ---- -xxx ---- -uuu
FE5h WREG_
SHAD
Working Register Shadow xxxx xxxx uuuu uuuu
FE6h BSR_
SHAD
— — — Bank Select Register Shadow ---x xxxx ---u uuuu
FE7h PCLATH_
SHAD
— Program Counter Latch High Register Shadow -xxx xxxx uuuu uuuu
FE8h FSR0L_
SHAD
Indirect Data Memory Address 0 Low Pointer Shadow xxxx xxxx uuuu uuuu
FE9h FSR0H_
SHAD
Indirect Data Memory Address 0 High Pointer Shadow xxxx xxxx uuuu uuuu
FEAh FSR1L_
SHAD
Indirect Data Memory Address 1 Low Pointer Shadow xxxx xxxx uuuu uuuu
FEBh FSR1H_
SHAD
Indirect Data Memory Address 1 High Pointer Shadow xxxx xxxx uuuu uuuu
FECh
— Unimplemented — —
FEDh
STKPTR
— — — Current Stack Pointer ---1 1111 ---1 1111
FEEh
TOSL
Top-of-Stack Low byte xxxx xxxx uuuu uuuu
FEFh
TOSH
— Top-of-Stack High byte -xxx xxxx -uuu uuuu
TABLE 3-12: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addres
s
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved. Shaded locations are unimplemented, read as ‘0’.
Note 1: PIC16(L)F1459 only.
2: PIC16(L)F1455/9 only.
3: Unimplemented, read as ‘1’.