Datasheet
2012 Microchip Technology Inc. Preliminary DS41639A-page 371
PIC16(L)F1454/5/9
TABLE 29-5: TIMER0 AND TIMER1 EXTERNAL CLOCK REQUIREMENTS
TABLE 29-6: PIC16(L)F1454/5/9 A/D CONVERTER (ADC) CHARACTERISTICS:
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C TA +125°C
Param
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
40* TT0H T0CKI High Pulse Width No Prescaler 0.5 TCY + 20 — — ns
With Prescaler 10 — — ns
41* T
T0L T0CKI Low Pulse Width No Prescaler 0.5 TCY + 20 — — ns
With Prescaler 10 — — ns
42* T
T0P T0CKI Period Greater of:
20 or T
CY + 40
N
— — ns N = prescale value
(2, 4, ..., 256)
45* T
T1H T1CKI High
Time
Synchronous, No Prescaler 0.5 TCY + 20 — — ns
Synchronous,
with Prescaler
15 — — ns
Asynchronous 30 — — ns
46* T
T1L T1CKI Low
Time
Synchronous, No Prescaler 0.5 TCY + 20 — — ns
Synchronous, with Prescaler 15 — — ns
Asynchronous 30 — — ns
47* T
T1P T1CKI Input
Period
Synchronous Greater of:
30 or T
CY + 40
N
— — ns N = prescale value
(1, 2, 4, 8)
Asynchronous 60 — — ns
49* TCKEZ
TMR1 Delay from External Clock Edge to Timer
Increment
2 TOSC —7 TOSC — Timers in Sync
mode
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: For proper operation, the minimum value of the ADC positive voltage reference must be 1.8V or greater.
Standard Operating Conditions (unless otherwise stated)
Operating temperature Tested at 25°C
Param
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
AD01 NR Resolution — — 10 bit
AD02 E
IL Integral Error — — ±1.7 LSb VREF = 3.0V
AD03 EDL Differential Error — — ±1 LSb No missing codes
VREF = 3.0V
AD04 E
OFF Offset Error — — ±2.5 LSb VREF = 3.0V
AD05 E
GN Gain Error — — ±2.0 LSb VREF = 3.0V
AD06 V
REF Reference Voltage
(3)
1.8 — VDD VVREF = (VREF+ minus VREF-)
AD07 V
AIN Full-Scale Range VSS —VREF V
AD08 Z
AIN Recommended Impedance of
Analog Voltage Source
—— 10k Can go higher if external 0.01F capacitor is
present on input pin.
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: Total Absolute Error includes integral, differential, offset and gain errors.
2: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
3: ADC VREF is from external VREF+ pin, VDD pin, whichever is selected as reference input.
4: When ADC is off, it will not consume any current other than leakage current. The power-down current specification
includes any such leakage from the ADC module.