Datasheet

 2012 Microchip Technology Inc. Preliminary DS41639A-page 367
PIC16(L)F1454/5/9
29.9 AC Characteristics: PIC16(L)F1454/5/9-I/E
FIGURE 29-5: CLOCK TIMING
TABLE 29-1: CLOCK OSCILLATOR TIMING REQUIREMENTS
TABLE 29-2: OSCILLATOR PARAMETERS
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C  TA  +125°C
Param
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
OS01 FOSC External CLKIN Frequency
(1)
DC — 0.5 MHz EC Oscillator mode (low)
DC — 4 MHz EC Oscillator mode (medium)
DC — 20 MHz EC Oscillator mode (high)
OS02 T
OSC External CLKIN Period
(1)
31.25 —  ns EC mode
OS03 T
CY Instruction Cycle Time
(1)
125 — DC ns TCY = FOSC/4
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values are based on
characterization data for that particular oscillator type under standard operating conditions with the device executing code.
Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current con-
sumption. All devices are tested to operate at “min” values with an external clock applied to CLKIN pin. When an external
clock input is used, the “max” cycle time limit is “DC” (no clock) for all devices.
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C TA +125°C
Param
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
OS08 HFOSC Internal Calibrated HFINTOSC Frequency
(1)
— 16.0 — MHz 0°C  TA  +85°C
OS08A HF
TOL Frequency Tolerance — ± 3 — % +25°C, 16 MHz
—± 6— %0°C
 TA  +85°C, 16 MHz
OS09 LF
OSC Internal LFINTOSC Frequency — 31 — kHz -40°C  TA  +125°C
OS10* T
IOSC ST HFINTOSC
Wake-up from Sleep Start-up Time
—5 8s
OS11* TUNELOCK HFINTOSC
Self-tune Lock Time
—<5 8mS
NOTE 2
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.
Note 1: To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as
possible. 0.1
F and 0.01 F values in parallel are recommended.
2: Time for reference clock stable and in range to HFINTOSC tuned within range specified by OS08A (with Self-Tune).
CLKIN
CLKOUT
Q4 Q1 Q2 Q3 Q4 Q1
OS02
OS03
(CLKOUT Mode)
Note 1: See Table 29-3 for timing information.
OS11
OS12