Datasheet
2012 Microchip Technology Inc. Preliminary DS41639A-page 31
PIC16(L)F1454/5/9
TABLE 3-5: PIC16(L)F1455 MEMORY MAP, BANK 0-7
BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 BANK 5 BANK 6 BANK 7
000h
Core Registers
(Tab l e 3- 2)
080h
Core Registers
(Tab l e 3- 2)
100h
Core Registers
(Table 3-2)
180h
Core Registers
(Table 3-2)
200h
Core Registers
(Table 3-2)
280h
Core Registers
(Table 3-2)
300h
Core Registers
(Table 3-2)
380h
Core Registers
(Table 3-2)
00Bh 08Bh 10Bh 18Bh 20Bh 28Bh 30Bh 38Bh
00Ch PORTA 08Ch TRISA 10Ch LATA 18Ch ANSELA 20Ch WPUA 28Ch
— 30Ch — 38Ch —
00Dh
— 08Dh — 10Dh — 18Dh — 20Dh — 28Dh — 30Dh — 38Dh —
00Eh PORTC 08Eh TRISC 10Eh LATC 18Eh ANSELC 20Eh
—28Eh—30Eh—38Eh—
00Fh
—08Fh—10Fh—18Fh—20Fh—28Fh—30Fh—38Fh—
010h
—090h—110h—190h—210h—290h
—
310h
— 390h —
011h PIR1 091h PIE1 111h CM1CON0 191h PMADRL 211h
SSP1BUF
291h
—
311h
—
391h IOCAP
012h PIR2 092h PIE2 112h CM1CON1 192h PMADRH 212h
SSP1ADD
292h
—
312h
—
392h IOCAN
013h
—093h— 113h CM2CON0 193h PMDATL 213h
SSP1MSK
293h
—
313h
—
393h
IOCAF
014h
—094h— 114h CM2CON1 194h PMDATH 214h
SSP1STAT
294h
—
314h
—
394h
—
015h TMR0 095h OPTION_REG 115h CMOUT 195h PMCON1 215h
SSP1CON1
295h
—
315h
—
395h
—
016h
TMR1L 096h PCON 116h BORCON 196h PMCON2 216h
SSP1CON2
296h
— 316h — 396h
—
017h
TMR1H 097h WDTCON 117h FVRCON 197h VREGCON 217h
SSP1CON3
297h
— 317h — 397h —
018h
T1CON 098h OSCTUNE 118h
DACCON0
198h
—218h
—
298h
— 318h — 398h —
019h
T1GCON 099h OSCCON 119h
DACCON1
199h
RCREG
219h
—299h— 319h — 399h —
01Ah
TMR2 09Ah OSCSTAT 11Ah
—19Ah
TXREG
21Ah —29Ah—31Ah—39Ah
CLKRCON
01Bh
PR2 09BhADRESL11Bh
—19Bh
SPBRG
21Bh —29Bh—31Bh
—
39Bh CRCON
01Ch
T2CON 09Ch ADRESH 11Ch
— 19Ch
SPBRGH
21Ch — 29Ch — 31Ch
—
39Ch
—
01Dh
— 09Dh ADCON0 11Dh APFCON 19Dh
RCSTA
21Dh
—
29Dh
—
31Dh
—
39Dh
—
01Eh
—
09Eh ADCON1 11Eh
—
19Eh
TXSTA
21Eh
—
29Eh
—
31Eh
—
39Eh
—
01Fh
—
09Fh ADCON2 11Fh
—19Fh
BAUDCON
21Fh
—
29Fh
—
31Fh
—
39Fh
—
020h
Dual-Port
General
Purpose
Register
80 Bytes
0A0h
Dual-Port
General
Purpose
Register
80 Bytes
120h
Dual-Port
General
Purpose
Register
80 Bytes
1A0h
Dual-Port
General
Purpose
Register
80 Bytes
220h
Dual-Port
General
Purpose
Register
80 Bytes
2A0h
Dual-Port
General
Purpose
Register
80 Bytes
320h
Dual-Port
General
Purpose
Register
16Bytes
3A0h
General
Purpose
Register
80 Bytes
0EFh
32Fh
330h
General
Purpose
Register
64 Bytes
06Fh
16Fh 1EFh 26Fh 2EFh 36Fh 3EFh
070h
Dual-Port
Common RAM
0F0h
Common RAM
(Accesses
70h – 7Fh)
170h
Common RAM
(Accesses
70h – 7Fh)
1F0h
Common RAM
(Accesses
70h – 7Fh)
270h
Common RAM
(Accesses
70h – 7Fh)
2F0h
Common RAM
(Accesses
70h – 7Fh)
370h
Common RAM
(Accesses
70h – 7Fh)
3F0h
Common RAM
(Accesses
70h – 7Fh)
07Fh 0FFh 17Fh 1FFh 27Fh 2FFh 37Fh 3FFh
Legend: = Unimplemented data memory locations, read as ‘0’.