Datasheet

PIC16(L)F1454/5/9
DS41639A-page 304 Preliminary  2012 Microchip Technology Inc.
REGISTER 25-2: CWGxCON1: CWG CONTROL REGISTER 1
R/W-x/u R/W-x/u R/W-x/u R/W-x/u U-0 U-0 R/W-0/0 R/W-0/0
GxASDLB<1:0> GxASDLA<1:0>
— —
GxIS<1:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared q = Value depends on condition
bit 7-6 GxASDLB<1:0>: CWGx Shutdown State for CWGxB
When an auto-shutdown event is present (GxASE = 1):
11 = CWGxB pin is driven to ‘1’, regardless of the setting of the GxPOLB bit
10 = CWGxB pin is driven to ‘0’, regardless of the setting of the GxPOLB bit
01 = CWGxB pin is tri-stated
00 = CWGxB pin is driven to its inactive state after the selected dead-band interval. GxPOLB still will
control the polarity of the output
bit 5-4
GxASDLA<1:0>: CWGx Shutdown State for CWGxA
When an auto shutdown event is present (GxASE = 1):
11 = CWGxA pin is driven to ‘1’, regardless of the setting of the GxPOLA bit
10 = CWGxA pin is driven to ‘0’, regardless of the setting of the GxPOLA bit
01 = CWGxA pin is tri-stated
00 = CWGxA pin is driven to its inactive state after the selected dead-band interval. GxPOLA still will
control the polarity of the output
bit 3-2
Unimplemented: Read as ‘0’
bit 1-0
GxIS<2:0>: CWGx Input Source Select bits
11 =PWM2OUT
10 =PWM1OUT
01 = async_C1OUT
00 = async_C2OUT