Datasheet

 2012 Microchip Technology Inc. Preliminary DS41639A-page 265
PIC16(L)F1454/5/9
TABLE 23-2: SUMMARY OF REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
BAUDCON ABDOVF RCIDL — SCKP BRG16 —WUEABDEN 269
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF 96
PIE1
TMR1GIE ADIE
(2)
RCIE TXIE SSP1IE — TMR2IE TMR1IE 97
PIR1
TMR1GIF ADIF
(2)
RCIF TXIF SSP1IF — TMR2IF TMR1IF
99
RCREG EUSART Receive Data Register 262*
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 268*
SPBRGL BRG<7:0> 270*
SPBRGH BRG<15:8> 270*
TRISC TRISC7
(1)
TRISC6
(1)
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 140
TXSTA
CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 267
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for asynchronous reception.
* Page provides register information.
Note 1: PIC16(L)F1459 only.
2: PIC16(L)F1455/9 only.