Datasheet

 2012 Microchip Technology Inc. Preliminary DS41639A-page 197
PIC16(L)F1454/5/9
TABLE 20-5: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER1
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ANSELA
(3)
— — —ANSA4 — — — — 133
APFCON
CLKRSEL SDOSEL
(2)
SSSEL —T1GSELP2SEL
(2)
— — 130
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF 96
PIE1 TMR1GIE
ADIE
(3)
RCIE TXIE SSP1IE — TMR2IE TMR1IE 97
PIR1 TMR1GIF
ADIF
(3)
RCIF TXIF SSP1IF — TMR2IF TMR1IF 99
TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Count 187*
TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Count 187*
TRISA
— — TRISA5 TRISA4 —
(1)
— —
(1)
—
(1)
132
T1CON TMR1CS<1:0> T1CKPS<1:0> T1OSCEN T1SYNC
—TMR1ON195
T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/
DONE
T1GVAL T1GSS<1:0> 196
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by the Timer1 module.
* Page provides register information.
Note 1: Unimplemented, read as ‘1’.
2: PIC16(L)F1455 only.
3: PIC16(L)F1455/9 only.