Datasheet
PIC16CE62X
DS40182D-page 92 1998-2013 Microchip Technology Inc.
FIGURE 13-6: CLKOUT AND I/O TIMING
TABLE 13-4: CLKOUT AND I/O TIMING REQUIREMENTS
Parameter # Sym Characteristic Min Typ† Max Units
10* TosH2ckL
OSC1 to CLKOUT
(1)
—75200ns
11* TosH2ckH
OSC1 to CLKOUT
(1)
—75
200
ns
12* TckR
CLKOUT rise time
(1)
—35100ns
13* TckF
CLKOUT fall time
(1)
—35100ns
14* TckL2ioV
CLKOUT to Port out valid
(1)
— — 20 ns
15* TioV2ckH
Port in valid before CLKOUT
(1)
Tosc +200 ns — — ns
16* TckH2ioI
Port in hold after CLKOUT
(1)
0——ns
17* TosH2ioV OSC1 (Q1 cycle) to Port out valid — 50 150 ns
18* TosH2ioI OSC1 (Q2 cycle) to Port input invalid (I/O in hold
time)
100 — — ns
19* TioV2osH Port input valid to OSC1(I/O in setup time) 0 — — ns
20* TioR Port output rise time — 10 40 ns
21* TioF Port output fall time — 10 40 ns
22* Tinp RB0/INT pin high or low time 25 — — ns
23 Trbp RB<7:4> change interrupt high or low time T
CY ——ns
* These parameters are characterized but not tested
† Data in "Typ" column is at 5.0V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested.
Note 1: Measurements are taken in RC Mode where CLKOUT output is 4 x T
OSC.
22
23
Note: All tests must be do with specified capacitance loads (Figure 13-4) 50 pF on I/O pins and CLKOUT
OSC1
CLKOUT
I/O Pin
(input)
I/O Pin
(output)
Q4
Q1
Q2 Q3
10
13
14
17
20, 21
19
18
15
11
12
16
old value
new value