Datasheet

 1998-2013 Microchip Technology Inc. DS40182D-page 73
PIC16CE62X
NOP No Operation
Syntax: [
label ] NOP
Operands: None
Operation: No operation
Status Affected: None
Encoding:
00 0000 0xx0 0000
Description:
No operation.
Words: 1
Cycles: 1
Example
NOP
OPTION Load Option Register
Syntax: [ label ] OPTION
Operands: None
Operation: (W)  OPTION
Status Affected: None
Encoding:
00 0000 0110 0010
Description:
The contents of the W register are
loaded in the OPTION register. This
instruction is supported for code
compatibility with PIC16C5X products.
Since OPTION is a readable/writable
register, the user can directly
address it.
Words: 1
Cycles: 1
Example
To maintain upward compatibility
with future PIC
®
MCU products, do
not use this instruction.
RETFIE Return from Interrupt
Syntax: [
label ] RETFIE
Operands: None
Operation: TOS  PC,
1  GIE
Status Affected: None
Encoding:
00 0000 0000 1001
Description:
Return from Interrupt. Stack is POPed
and Top of Stack (TOS) is loaded in
the PC. Interrupts are enabled by
setting Global Interrupt Enable bit,
GIE (INTCON<7>). This is a two-cycle
instruction.
Words: 1
Cycles: 2
Example
RETFIE
After Interrupt
PC = TOS
GIE = 1
RETLW Return with Literal in W
Syntax: [
label ] RETLW k
Operands: 0  k  255
Operation: k  (W);
TOS  PC
Status Affected: None
Encoding:
11 01xx kkkk kkkk
Description:
The W register is loaded with the eight
bit literal 'k'. The program counter is
loaded from the top of the stack (the
return address). This is a two-cycle
instruction.
Words: 1
Cycles: 2
Example
TABLE
CALL TABLE ;W contains table
;offset value
• ;W now has table
value
•
•
ADDWF PC ;W = offset
RETLW k1 ;Begin table
RETLW k2 ;
•
•
•
RETLW kn ; End of table
Before Instruction
W = 0x07
After Instruction
W = value of k8