Datasheet

 1998-2013 Microchip Technology Inc. DS40182D-page 21
PIC16CE62X
4.4 Indirect Addressing, INDF and FSR
Registers
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses data pointed to by the File Select Register
(FSR). Reading INDF itself indirectly will produce 00h.
Writing to the INDF register indirectly results in a
no-operation (although status bits may be affected). An
effective 9-bit address is obtained by concatenating the
8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 4-7. However, IRP is not used in the
PIC16CE62X.
A simple program to clear RAM location 20h-2Fh using
indirect addressing is shown in Example 4-1.
EXAMPLE 4-1: INDIRECT ADDRESSING
movlw 0x20 ;initialize pointer
movwf FSR ;to RAM
NEXT clrf INDF ;clear INDF register
incf FSR ;inc pointer
btfss FSR,4 ;all done?
goto NEXT ;no clear next
;yes continue
CONTINUE:
FIGURE 4-7: DIRECT/INDIRECT ADDRESSING PIC16CE62X
For memory map detail see Figure 4-4 and Figure 4-5.
Note 1: The RP1 and IRP bits are reserved; always maintain these bits clear.
Data
Memory
Indirect AddressingDirect Addressing
bank select location select
RP1 RP0
(1)
6
0
from opcode
IRP
(1)
FSR Register
7
0
bank select
location select
00 01 10 11
180h
1FFh
00h
7Fh
Bank 0 Bank 1 Bank 2 Bank 3
not used