Datasheet

PIC16C9XX
DS30444E - page 40  1997 Microchip Technology Inc.
5.7 PORTG and TRISG Register
PORTG is an digital input only port. Each pin is multi-
plexed with an LCD segment driver. These pins have
Schmitt Trigger input buffers.
EXAMPLE 5-7: INITIALIZING PORTG
BCF STATUS,RP0 ;Select Bank2
BSF STATUS,RP1 ;
BCF LCDSE,SE27 ;Make all PORTG
BCF LCDSE,SE20 ;and PORTE<7>
;digital inputs
Note 1: On a Power-on Reset these pins are con-
figured as LCD segment drivers.
Note 2: To configure the pins as a digital port, the
corresponding bits in the LCDSE register
must be cleared. Any bit set in the LCDSE
register overrides any bit settings in the
corresponding TRIS register.
FIGURE 5-10: PORTG BLOCK DIAGRAM
RD PORT
Schmitt
Trigger
input
buffer
EN
Q D
EN
Digital Input/
LCDSE<n>
LCD
LCD Segment
LCD Output pin
LCD
LCD Common
Data Bus
RD TRIS
V
DD
Segment Data
Output Enable
Common Data
Output Enable
TABLE 5-13: PORTG FUNCTIONS
TABLE 5-14: SUMMARY OF REGISTERS ASSOCIATED WITH PORTG
Name Bit# Buffer Type Function
RG0/SEG20 bit0 ST Digital input or Segment Driver20
RG1/SEG21 bit1 ST Digital input or Segment Driver21
RG2/SEG22 bit2 ST Digital input or Segment Driver22
RG3/SEG23 bit3 ST Digital input or Segment Driver23
RG4/SEG24 bit4 ST Digital input or Segment Driver24
RG5/SEG25 bit5 ST Digital input or Segment Driver25
RG6/SEG26 bit6 ST Digital input or Segment Driver26
RG7/SEG28 bit7 ST Digital input or Segment Driver28 (not available on 64-pin devices)
Legend: ST = Schmitt Trigger input
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
Power-on
Reset
Value on all
other resets
108h PORTG RG7 RG6 RG5 RG4 RG3 RG2 RG1 RG0 0000 0000 0000 0000
188h TRISG PORTG Data Direction Control Register 1111 1111 1111 1111
10Dh LCDSE SE29 SE27 SE20 SE16 SE12 SE9 SE5 SE0 1111 1111 1111 1111
Legend: Shaded cells are not used by PORTG.