Datasheet

PIC16C9XX
DS30444E - page 22 1997 Microchip Technology Inc.
Bank 3
180h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) 0000 0000 0000 0000
181h OPTION RBPU
INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111
182h PCL Program Counter's (PC) Least Significant Byte 0000 0000 0000 0000
183h STATUS IRP RP1 RP0 T
O PD Z DC C 0001 1xxx 000q quuu
184h FSR Indirect data memory address pointer xxxx xxxx uuuu uuuu
185h Unimplemented
186h TRISB PORTB Data Direction Register 1111 1111 1111 1111
187h TRISF PORTF Data Direction Register 1111 1111 1111 1111
188h TRISG PORTG Data Direction Register 1111 1111 1111 1111
189h Unimplemented
18Ah PCLATH
Write Buffer for the upper 5 bits of the PC ---0 0000 ---0 0000
18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u
18Ch Unimplemented
18Dh Unimplemented
18Eh Unimplemented
18Fh Unimplemented
190h Unimplemented
191h Unimplemented
192h Unimplemented
193h Unimplemented
194h Unimplemented
195h Unimplemented
196h Unimplemented
197h Unimplemented
198h Unimplemented
199h Unimplemented
19Ah Unimplemented
19Bh Unimplemented
19Ch Unimplemented
19Dh Unimplemented
19Eh Unimplemented
19Fh Unimplemented
TABLE 4-1: SPECIAL FUNCTION REGISTER SUMMARY (Cont.d)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
Power-on
Reset
Value on all
other resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as '0',
shaded locations are unimplemented, read as ‘0’.
Note 1: Registers ADRES, ADCON0, and ADCON1 are not implemented in the PIC16C923, read as '0'.
2: These bits are reserved on the PIC16C923, always maintain these bits clear.
3: These pixels do not display, but can be used as general purpose RAM.
4: PIC16C923 reset values for PORTA: --xx xxxx for a POR, and --uu uuuu for all other resets,
PIC16C924 reset values for PORTA: --0x 0000 when read.
5: Bit1 of ADCON0 is reserved on the PIC16C924, always maintain this bit clear.