Datasheet

 1997 Microchip Technology Inc. DS30444E - page 21
PIC16C9XX
Bank 2
100h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) 0000 0000 0000 0000
101h TMR0 Timer0 module’s register xxxx xxxx uuuu uuuu
102h PCL Program Counter's (PC) Least Significant Byte 0000 0000 0000 0000
103h STATUS IRP RP1 RP0 T
O PD Z DC C 0001 1xxx 000q quuu
104h FSR Indirect data memory address pointer xxxx xxxx uuuu uuuu
105h — Unimplemented — —
106h PORTB PORTB Data Latch when written: PORTB pins when read xxxx xxxx uuuu uuuu
107h PORTF PORTF pins when read 0000 0000 0000 0000
108h PORTG PORTG pins when read 0000 0000 0000 0000
109h — Unimplemented — —
10Ah PCLATH
— — — Write Buffer for the upper 5 bits of the PC ---0 0000 ---0 0000
10Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u
10Ch — Unimplemented — —
10Dh LCDSE SE29 SE27 SE20 SE16 SE12 SE9 SE5 SE0 1111 1111 1111 1111
10Eh LCDPS
— — — — LP3 LP2 LP1 LP0 ---- 0000 ---- 0000
10Fh LCDCON LCDEN SLPEN
— VGEN CS1 CS0 LMUX1 LMUX0 00-0 0000 00-0 0000
110h LCDD00
SEG07
COM0
SEG06
COM0
SEG05
COM0
SEG04
COM0
SEG03
COM0
SEG02
COM0
SEG01
COM0
SEG00
COM0
xxxx xxxx uuuu uuuu
111h LCDD01
SEG15
COM0
SEG14
COM0
SEG13
COM0
SEG12
COM0
SEG11
COM0
SEG10
COM0
SEG09
COM0
SEG08
COM0
xxxx xxxx uuuu uuuu
112h LCDD02
SEG23
COM0
SEG22
COM0
SEG21
COM0
SEG20
COM0
SEG19
COM0
SEG18
COM0
SEG17
COM0
SEG16
COM0
xxxx xxxx uuuu uuuu
113h LCDD03
SEG31
COM0
SEG30
COM0
SEG29
COM0
SEG28
COM0
SEG27
COM0
SEG26
COM0
SEG25
COM0
SEG24
COM0
xxxx xxxx uuuu uuuu
114h LCDD04
SEG07
COM1
SEG06
COM1
SEG05
COM1
SEG04
COM1
SEG03
COM1
SEG02
COM1
SEG01
COM1
SEG00
COM1
xxxx xxxx uuuu uuuu
115h LCDD05
SEG15
COM1
SEG14
COM1
SEG13
COM1
SEG12
COM1
SEG11
COM1
SEG10
COM1
SEG09
COM1
SEG08
COM1
xxxx xxxx uuuu uuuu
116h LCDD06
SEG23
COM1
SEG22
COM1
SEG21
COM1
SEG20
COM1
SEG19
COM1
SEG18
COM1
SEG17
COM1
SEG16
COM1
xxxx xxxx uuuu uuuu
117h LCDD07
SEG31
COM1
(3)
SEG30
COM1
SEG29
COM1
SEG28
COM1
SEG27
COM1
SEG26
COM1
SEG25
COM1
SEG24
COM1
xxxx xxxx uuuu uuuu
118h LCDD08
SEG07
COM2
SEG06
COM2
SEG05
COM2
SEG04
COM2
SEG03
COM2
SEG02
COM2
SEG01
COM2
SEG00
COM2
xxxx xxxx uuuu uuuu
119h LCDD09
SEG15
COM2
SEG14
COM2
SEG13
COM2
SEG12
COM2
SEG11
COM2
SEG10
COM2
SEG09
COM2
SEG08
COM2
xxxx xxxx uuuu uuuu
11Ah LCDD10
SEG23
COM2
SEG22
COM2
SEG21
COM2
SEG20
COM2
SEG19
COM2
SEG18
COM2
SEG17
COM2
SEG16
COM2
xxxx xxxx uuuu uuuu
11Bh LCDD11
SEG31
COM2
(3)
SEG30
COM2
(3)
SEG29
COM2
SEG28
COM2
SEG27
COM2
SEG26
COM2
SEG25
COM2
SEG24
COM2
xxxx xxxx uuuu uuuu
11Ch LCDD12
SEG07
COM3
SEG06
COM3
SEG05
COM3
SEG04
COM3
SEG03
COM3
SEG02
COM3
SEG01
COM3
SEG00
COM3
xxxx xxxx uuuu uuuu
11Dh LCDD13
SEG15
COM3
SEG14
COM3
SEG13
COM3
SEG12
COM3
SEG11
COM3
SEG10
COM3
SEG09
COM3
SEG08
COM3
xxxx xxxx uuuu uuuu
11Eh LCDD14
SEG23
COM3
SEG22
COM3
SEG21
COM3
SEG20
COM3
SEG19
COM3
SEG18
COM3
SEG17
COM3
SEG16
COM3
xxxx xxxx uuuu uuuu
11Fh LCDD15
SEG31
COM3
(3)
SEG30
COM3
(3)
SEG29
COM3
(3)
SEG28
COM3
SEG27
COM3
SEG26
COM3
SEG25
COM3
SEG24
COM3
xxxx xxxx uuuu uuuu
TABLE 4-1: SPECIAL FUNCTION REGISTER SUMMARY (Cont.’d)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
Power-on
Reset
Value on all
other resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as '0',
shaded locations are unimplemented, read as ‘0’.
Note 1: Registers ADRES, ADCON0, and ADCON1 are not implemented in the PIC16C923, read as '0'.
2: These bits are reserved on the PIC16C923, always maintain these bits clear.
3: These pixels do not display, but can be used as general purpose RAM.
4: PIC16C923 reset values for PORTA: --xx xxxx for a POR, and --uu uuuu for all other resets,
PIC16C924 reset values for PORTA: --0x 0000 when read.
5: Bit1 of ADCON0 is reserved on the PIC16C924, always maintain this bit clear.