Datasheet

PIC16C9XX
DS30444E - page 150  1997 Microchip Technology Inc.
FIGURE 17-5: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP TIMER
TIMING
TABLE 17-6: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP TIMER
REQUIREMENTS
Parameter
No.
Sym Characteristic Min Typ† Max Units Conditions
30 TmcL MCLR Pulse Width (low) 2 — — µs
31* Twdt Watchdog Timer Time-out Period
(No Prescaler)
7 18 33 ms VDD = 5V, -40˚C to +85˚C
32 Tost Oscillation Start-up Timer Period — 1024TOSC — — TOSC = OSC1 period
33* Tpwrt Power-up Timer Period 28 72 132 ms VDD = 5V, -40˚C to +85˚C
34 TIOZ
I/O Hi-impedance from MCLR Low
or Watchdog Timer Reset
— — 2.1 µs
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Time-out
Internal
RESET
Watchdog
Timer
RESET
33
32
30
31
34
I/O Pins
34
Refer to Figure 17-2 for load conditions.