Datasheet

1997 Microchip Technology Inc. DS30444E - page 109
PIC16C9XX
PORTD 923 924 0000 0000 0000 0000 uuuu uuuu
PORTE 923 924 0000 0000 0000 0000 uuuu uuuu
PCLATH 923 924 ---0 0000 ---0 0000 ---u uuuu
INTCON 923 924 0000 000x 0000 000u uuuu uuuu
(1)
PIR1
(4)
923 924 00-- 0000 00-- 0000 uu-- uuuu
(1)
TMR1L 923 924 xxxx xxxx uuuu uuuu uuuu uuuu
TMR1H 923 924 xxxx xxxx uuuu uuuu uuuu uuuu
T1CON 923 924 --00 0000 --uu uuuu --uu uuuu
TMR2 923 924 0000 0000 0000 0000 uuuu uuuu
T2CON 923 924 -000 0000 -000 0000 -uuu uuuu
SSPBUF 923 924 xxxx xxxx uuuu uuuu uuuu uuuu
SSPCON 923 924 0000 0000 0000 0000 uuuu uuuu
CCPR1L 923 924 xxxx xxxx uuuu uuuu uuuu uuuu
CCPR1H 923 924 xxxx xxxx uuuu uuuu uuuu uuuu
CCP1CON 923 924 --00 0000 --00 0000 --uu uuuu
ADRES
923 924 xxxx xxxx uuuu uuuu uuuu uuuu
ADCON0
923 924 0000 00-0 0000 00-0 uuuu uu-u
OPTION 923 924 1111 1111 1111 1111 uuuu uuuu
TRISA 923 924 --11 1111 --11 1111 --uu uuuu
TRISB 923 924 1111 1111 1111 1111 uuuu uuuu
TRISC 923 924 --11 1111 --11 1111 --uu uuuu
TRISD 923 924 1111 1111 1111 1111 uuuu uuuu
TRISE 923 924 1111 1111 1111 1111 uuuu uuuu
PIE1
(4)
923 924 00-- 0000 00-- 0000 uu-- uuuu
PCON 923 924 ---- --0- ---- --u- ---- --u-
PR2 923 924 1111 1111 1111 1111 1111 1111
SSPADD 923 924 0000 0000 0000 0000 uuuu uuuu
SSPSTAT 923 924 0000 0000 0000 0000 uuuu uuuu
ADCON1
923 924 ---- -000 ---- -000 ---- -uuu
PORTF 923 924 0000 0000 0000 0000 uuuu uuuu
PORTG 923 924 0000 0000 0000 0000 uuuu uuuu
TABLE 14-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS (Cont.d)
Register Applicable Devices Power-on Reset MCLR Resets
WDT Reset
Wake-up via
WDT or
Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as '0', q = value depends on condition
Note 1: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
3: See Table 14-5 for reset value for specific condition.
4: Bits PIE1<6> and PIR1<6> are reserved on the PIC16C923, always maintain these bits clear.
5: PORTA values when read.