Datasheet

PIC16C9XX
DS30444E - page 108  1997 Microchip Technology Inc.
TABLE 14-4: STATUS BITS AND THEIR SIGNIFICANCE
TABLE 14-5: RESET CONDITION FOR SPECIAL REGISTERS
POR TO PD
0 1 1 Power-on Reset
0 0 x Illegal, T
O is set on POR
0 x 0 Illegal, PD is set on POR
1 0 1 WDT Reset
1 0 0 WDT Wake-up
1 u u MCLR
Reset during normal operation
1 1 0 MCLR
Reset during SLEEP or interrupt wake-up from SLEEP
Legend: u = unchanged, x = unknown
Condition
Program
Counter
STATUS
Register
PCON
Register
Power-on Reset 000h 0001 1xxx ---- --0-
MCLR
Reset during normal operation 000h 000u uuuu ---- --u-
MCLR
Reset during SLEEP 000h 0001 0uuu ---- --u-
WDT Reset 000h 0000 1uuu ---- --u-
WDT Wake-up PC + 1 uuu0 0uuu ---- --u-
Interrupt wake-up from SLEEP PC + 1
(1)
uuu1 0uuu ---- --u-
Legend: u = unchanged, x = unknown, - = unimplemented bit read as '0'.
Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded
with the interrupt vector (0004h).
TABLE 14-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register Applicable Devices Power-on Reset MCLR Resets
WDT Reset
Wake-up via
WDT or
Interrupt
W 923 924 xxxx xxxx uuuu uuuu uuuu uuuu
INDF 923 924 N/A N/A N/A
TMR0 923 924 xxxx xxxx uuuu uuuu uuuu uuuu
PCL 923 924 0000h 0000h PC + 1
(2)
STATUS 923 924 0001 1xxx 000q quuu
(3)
uuuq quuu
(3)
FSR 923 924 xxxx xxxx uuuu uuuu uuuu uuuu
PORTA 923
924 --xx xxxx --uu uuuu --uu uuuu
PORTA
923 924 --0x 0000
(5)
--0u 0000
(5)
--uu uuuu
PORTB 923 924 xxxx xxxx uuuu uuuu uuuu uuuu
PORTC 923 924 --xx xxxx --uu uuuu --uu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as '0', q = value depends on condition
Note 1: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
3: See Table 14-5 for reset value for specific condition.
4: Bits PIE1<6> and PIR1<6> are reserved on the PIC16C923, always maintain these bits clear.
5: PORTA values when read.