Datasheet

PIC16C77X
 1999-2013 Microchip Technology Inc. Advance Information DS30275B-page 105
FIGURE 9-6: USART RECEIVE BLOCK DIAGRAM
FIGURE 9-7: ASYNCHRONOUS RECEPTION WITH ADDRESS DETECT
x64 Baud Rate CLK
SPBRG
Baud Rate Generator
RC7/RX/DT
Pin Buffer
and Control
SPEN
Data
Recovery
CREN
OERR
FERR
RSR register
MSb
LSb
RX9D
RCREG register
FIFO
Interrupt
RCIF
RCIE
Data Bus
8
 64
 16
or
Stop
Start
(8)
7
1
0
RX9

RX9
ADDEN
RX9
ADDEN
RSR<8>
Enable
Load of
Receive
Buffer
8
8
Start
bit
bit1bit0
bit8 bit0Stop
bit
Start
bit bit8
Stop
bit
RC7/RX/DT (pin)
Load RSR
Read
RCIF
WORD 1
RCREG
Note: This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (receive buffer)
Bit8 = 0, Data Byte Bit8 = 1, Address Byte
because ADDEN = 1.
774.book Page 105 Tuesday, January 29, 2013 12:02 PM