Datasheet

PIC16C77X
 1999-2013 Microchip Technology Inc. Advance Information DS30275B-page 85
8.2.13 ACKNOWLEDGE SEQUENCE TIMING
An acknowledge sequence is enabled by setting the
acknowledge sequence enable bit, AKEN
(SSPCON2<4>). When this bit is set, the SCL pin is
pulled low and the contents of the acknowledge data
bit is presented on the SDA pin. If the user wishes to
generate an acknowledge, then the AKDT bit should be
cleared. If not, the user should set the AKDT bit before
starting an acknowledge sequence. The baud rate
generator then counts for one rollover period (T
BRG
),
and the SCL pin is de-asserted (pulled high). When the
SCL pin is sampled high (clock arbitration), the baud
rate generator counts for T
BRG
. The SCL pin is then
pulled low. Following this, the AKEN bit is automati-
cally cleared, the baud rate generator is turned off, and
the SSP module then goes into IDLE mode. (Figure 8-
29)
8.2.13.13 WCOL STATUS FLAG
If the user writes the SSPBUF when an acknowledege
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
FIGURE 8-29: ACKNOWLEDGE SEQUENCE WAVEFORM
Note: T
BRG
= one baud rate generator period.
SDA
SCL
Set SSPIF at the end
Acknowledge sequence starts here,
Write to SSPCON2
AKEN automatically cleared
Cleared in
T
BRG
T
BRG
of receive
ACK
8
AKEN = 1, AKDT = 0
D0
9
SSPIF
software
Set SSPIF at the end
of acknowledge sequence
Cleared in
software
774.book Page 85 Tuesday, January 29, 2013 12:02 PM