Datasheet

PIC16C77X
1999-2013 Microchip Technology Inc. Advance Information DS30275B-page 67
FIGURE 8-14: I
2
C SLAVE-TRANSMITTER (10-BIT ADDRESS)
SDA
SCL
SSPIF
BF (SSPSTAT<0>)
S
1 234 56 7 8 9 1 2345 67 89 1 2345 7 89
P
1 1 1 1 0 A9A8 A7 A6A5A4A3A2A1 A0 1 1 1 1 0 A8
R/W
=1
ACK
ACK
R/W = 0
ACK
Receive First Byte of Address
Cleared in software
Master sends NACK
A9
6
(PIR1<3>)
Receive Second Byte of Address
Cleared by hardware when
SSPADD is updated.
UA (SSPSTAT<1>)
Clock is held low until
update of SSPADD has
taken place
UA is set indicating that
the SSPADD needs to be
updated
UA is set indicating that
SSPADD needs to be
updated
Cleared by hardware when
SSPADD is updated.
SSPBUF is written with
contents of SSPSR
Dummy read of SSPBUF
to clear BF flag
Receive First Byte of Address
12345 789
D7 D6 D5 D4 D3 D1
ACK
D2
6
Transmitting Data Byte
D0
Dummy read of SSPBUF
to clear BF flag
Sr
Cleared in software
Write of SSPBUF
initiates transmit
Cleared in software
Transmit is complete
CKP has to be set for clock to be released
Bus Master
terminates
transfer
774.book Page 67 Tuesday, January 29, 2013 12:02 PM