Datasheet

PIC16C77X
 1999-2013 Microchip Technology Inc. DS30275B-page 189
INDEX
A
A/D ................................................................................... 117
A/D Converter Enable (ADIE Bit) ............................... 19
A/D Converter Flag (ADIF Bit) ................................... 20
ADCON0 Register .................................................... 117
ADCON1 Register ............................................ 117, 118
ADRES Register ...................................................... 117
Analog Port Pins ...................................... 7, 8, 9, 36, 37
Block Diagram .......................................................... 120
Configuring Analog Port ........................................... 119
Conversion time ....................................................... 125
Conversions ............................................................. 121
converter characteristics .................. 156, 157, 158, 165
Faster Conversion - Lower Resolution Tradeoff ...... 125
Internal Sampling Switch (Rss) Impedence ............. 123
Operation During Sleep ........................................... 126
Sampling Requirements ........................................... 123
Sampling Time ......................................................... 123
Source Impedance ................................................... 123
Special Event Trigger (CCP) ...................................... 49
A/D Conversion Clock ...................................................... 121
ACK
.................................................................................... 64
Acknowledge Data bit, AKD ............................................... 56
Acknowledge Pulse ............................................................ 64
Acknowledge Sequence Enable bit, AKE .......................... 56
Acknowledge Status bit, AKS ............................................ 56
ADCON0 Register ............................................................ 117
ADCON1 Register .................................................... 117, 118
ADRES ............................................................................. 117
ADRES Register .......................................... 13, 14, 117, 126
AKD .................................................................................... 56
AKE .................................................................................... 56
AKS .............................................................................. 56, 79
Application Note AN578, "Use of the SSP
Module in the I2C Multi-Master Environment." ................... 63
Architecture
PIC16C63A/PIC16C73B Block Diagram ...................... 5
PIC16C65B/PIC16C74B Block Diagram ...................... 6
Assembler
MPASM Assembler .................................................. 147
B
Banking, Data Memory ................................................ 11, 16
Baud Rate Generator ......................................................... 73
BF .................................................................... 54, 64, 79, 82
Block Diagrams
Baud Rate Generator ................................................. 73
I
2
C Master Mode ........................................................ 71
I
2
C Module ................................................................. 63
SSP (I
2
C Mode) ......................................................... 63
SSP (SPI Mode) ......................................................... 57
BOR.
See Brown-out Reset
BRG ................................................................................... 73
Brown-out Reset (BOR) ................... 127, 131, 132, 133, 134
BOR Status (BOR
Bit) ................................................ 23
Buffer Full bit, BF ............................................................... 64
Buffer Full Status bit, BF .................................................... 54
Bus Arbitration ................................................................... 90
Bus Collision
Section ....................................................................... 90
Bus Collision During a RESTART Condition ...................... 93
Bus Collision During a Start Condition ............................... 91
Bus Collision During a Stop Condition ............................... 94
C
Capture (CCP Module) ...................................................... 48
Block Diagram ........................................................... 48
CCP Pin Configuration .............................................. 48
CCPR1H:CCPR1L Registers .................................... 48
Changing Between Capture Prescalers .................... 48
Software Interrupt ...................................................... 48
Timer1 Mode Selection .............................................. 48
Capture/Compare/PWM (CCP) ......................................... 47
CCP1 ......................................................................... 47
CCP1CON Register ........................................... 47
CCPR1H Register ............................................. 47
CCPR1L Register .............................................. 47
Enable (CCP1IE Bit) .......................................... 19
Flag (CCP1IF Bit) .............................................. 20
RC2/CCP1 Pin ................................................. 7, 9
CCP2 ......................................................................... 47
CCP2CON Register ........................................... 47
CCPR2H Register ............................................. 47
CCPR2L Register .............................................. 47
Enable (CCP2IE Bit) .......................................... 21
Flag (CCP2IF Bit) .............................................. 22
RC1/T1OSI/CCP2 Pin ..................................... 7, 9
Interaction of Two CCP Modules ............................... 47
Timer Resources ....................................................... 47
CCP1CON ......................................................................... 15
CCP1CON Register ........................................................... 47
CCP1M3:CCP1M0 Bits ............................................. 47
CCP1X:CCP1Y Bits ................................................... 47
CCP2CON ......................................................................... 15
CCP2CON Register ........................................................... 47
CCP2M3:CCP2M0 Bits ............................................. 47
CCP2X:CCP2Y Bits ................................................... 47
CCPR1H Register ........................................................ 13, 15
CCPR1L Register .............................................................. 15
CCPR2H Register ........................................................ 13, 15
CCPR2L Register ........................................................ 13, 15
CKE ................................................................................... 54
CKP ................................................................................... 55
Clock Polarity Select bit, CKP ............................................ 55
Code Examples
Loading the SSPBUF register ................................... 58
Code Protection ....................................................... 127, 141
Compare (CCP Module) .................................................... 49
Block Diagram ........................................................... 49
CCP Pin Configuration .............................................. 49
CCPR1H:CCPR1L Registers .................................... 49
Software Interrupt ...................................................... 49
Special Event Trigger .......................................... 43, 49
Timer1 Mode Selection .............................................. 49
Configuration Bits ............................................................ 127
Conversion Considerations .............................................. 187
D
D/A ..................................................................................... 54
Data Memory ..................................................................... 11
Bank Select (RP1:RP0 Bits) ................................ 11, 16
General Purpose Registers ....................................... 11
Register File Map ...................................................... 12
Special Function Registers ........................................ 13
Data/Address
bit, D/A ........................................................ 54
DC Characteristics
PIC16C73 ................................................................ 152
PIC16C74 ................................................................ 152
Development Support ...................................................... 145
Development Tools .......................................................... 145
Device Differences ........................................................... 187
Direct Addressing .............................................................. 25
774.book Page 189 Tuesday, January 29, 2013 12:02 PM