Datasheet

PIC16C77X
 1999-2013 Microchip Technology Inc. Advance Information DS30275B-page 115
10.3 Low-voltage Detect (LVD)
This module is used to generate an interrupt when the
supply voltage falls below a specified “trip” voltage.
This module operates completely under software
control. This allows a user to power the module on
and off to periodically monitor the supply voltage, and
thus minimize total current consumption.
FIGURE 10-3: BLOCK DIAGRAM OF LVD AND VOLTAGE REFERENCE CIRCUIT
The LVD module is enabled by setting the LVDEN bit in
the LVDCON register. The “trip point” voltage is the
minimum supply voltage level at which the device can
operate before the LVD module asserts an interrupt.
When the supply voltage is equal to or less than the trip
point, the module will generate an interrupt signal set-
ting interrupt flag bit LVDIF. If interrupt enable bit LVDIE
was set, then an interrupt is generated. The LVD inter-
rupt can wake the device from sleep. The "trip point"
voltage is software programmable to any one of 16 val-
ues, five of which are reserved (See Figure 10-1). The
trip point is selected by programming the LV3:LV0 bits
(LVDCON<3:0>).
Once the LV bits have been programmed for the speci-
fied trip voltage, the low-voltage detect circuitry is then
enabled by setting the LVDEN (LVDCON<4>) bit.
If the bandgap reference voltage is previously unused
by either the brown-out circuitry or the voltage refer-
ence circuitry, then the bandgap circuit requires a time
to start-up and become stable before a low voltage con-
dition can be reliably detected. The low-voltage inter-
rupt flag is prevented from being set until the bandgap
has reached a stable reference voltage.
When the bandgap is stable the BGST (LVDCON<5>)
bit is set indicating that the low-voltage interrupt flag bit
is released to be set if V
DD is equal to or less than the
LVD trip point.
10.3.1 EXTERNAL ANALOG VOLTAGE INPUT
The LVD module has an additional feature that allows
the user to supply the trip voltage to the module from
an external source. This mode is enabled when
LV3:LV0 = 1111. When these bits are set the compar-
ator input is multiplexed from an external input pin
(RB3/AN9/LVDIN.
VDD
LVD
16 to 1 MUX
BGAP
A/D Ref = 4.096V
A/D Ref = 2.048V
EN
LVD C ON REFCON
BODEN
LVDE N
VRxEN
RB3/AN9/LVDIN
VDD
Note: The LVDIF bit can not be cleared until the
supply voltage rises above the LVD trip
point. If interrupts are enabled, clear the
LVDIE bit once the first LVD interrupt
occurs to prevent reentering the interrupt
service routine immediately after exiting
the ISR.
774.book Page 115 Tuesday, January 29, 2013 12:02 PM