Datasheet

PIC16C77X
 1999-2013 Microchip Technology Inc. Advance Information DS30275B-page 103
FIGURE 9-4: ASYNCHRONOUS TRANSMISSION
FIGURE 9-5: ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
TABLE 9-6 REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on:
POR,
BOR
Value on
all other
Resets
0Ch PIR1
PSPIF
(1)
ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF
0000 0000 0000 0000
18h RCSTA
SPEN RX9 SREN CREN ADDEN FERR OERR RX9D
0000 000x 0000 000x
19h TXREG
USART Transmit Register
0000 0000 0000 0000
8Ch PIE1
PSPIE
(1)
ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE
0000 0000 0000 0000
98h TXSTA
CSRC TX9 TXEN SYNC — BRGH TRMT TX9D
0000 -010 0000 -010
99h SPBRG Baud Rate Generator Register 0000 0000 0000 0000
Legend: x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for Asynchronous Transmission.
Note 1: Bits PSPIE and PSPIF are reserved on the 28-pin devices, always maintain these bits clear.
WORD 1
Stop Bit
WORD 1
Tra ns m it S h ift R e g
Start Bit Bit 0 Bit 1 Bit 7/8
Write to TXREG
Word 1
BRG output
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(Transmit buffer
reg. empty flag)
TRMT bit
(Transmit shift
reg. empty flag)
Transmit Shift Reg.
Write to TXREG
BRG output
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(interrupt reg. flag)
TRMT bit
(Transmit shift
reg. empty flag)
Word 1
Word 2
WORD 1
WORD 2
Start Bit
Stop Bit
Start Bit
Transmit Shift Reg.
WORD 1
WORD 2
Bit 0 Bit 1
Bit 7/8 Bit 0
Note: This timing diagram shows two consecutive transmissions.
774.book Page 103 Tuesday, January 29, 2013 12:02 PM