Datasheet

PIC16C745/765
DS41124D-page 96 Preliminary  1999-2013 Microchip Technology Inc.
12.2 Selecting the A/D Conversion Clock
The A/D conversion time per bit is defined as TAD. The
A/D conversion requires 9.5T
AD per 8-bit conversion.
The source of the A/D conversion clock is software
selectable. The four possible options for T
AD are:
•2T
OSC
•8TOSC
•32TOSC
• Dedicated Internal RC oscillator
For correct A/D conversions, the A/D conversion clock
(T
AD) must be selected to ensure a minimum TAD time
of 1.6 s.
TABLE 12-1: TAD vs. DEVICE OPERATING
FREQUENCIES
12.3 C
onfiguring Analog Port Pins
The ADCON1, TRISA and TRISE registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their correspond-
ing TRIS bits set (input). If the TRIS bit is cleared (out-
put), the digital output level (V
OH or VOL) will be
converted.
The A/D operation is independent of the state of the
CHS<2:0> bits and the TRIS bits.
12.4 A/D Conversions
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The ADRES register will
NOT be updated with the partially completed A/D con-
version sample. That is, the ADRES register will con-
tinue to contain the value of the last completed
conversion (or the last value written to the ADRES reg-
ister). After the A/D conversion is aborted, a 2T
AD wait
is required before the next acquisition is started. After
this 2T
AD wait, an acquisition is automatically started on
the selected channel.
12.5 A/D Operation During Sleep
The A/D module can operate during SLEEP mode.
This requires that the A/D clock source be set to RC
(ADCS<1:0> = 11). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the SLEEP
instruction to be executed, which eliminates all digital
switching noise from the conversion. When the con-
version is completed, the GO/DONE
bit will be
cleared, and the result loaded into the ADRES regis-
ter. If the A/D interrupt is enabled, the device will
wake-up from SLEEP. If the A/D interrupt is not
enabled, the A/D module will then be turned off,
although the ADON bit will remain set.
When the A/D clock source is another clock option (not
RC), a SLEEP instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
Turning off the A/D places the A/D module in its lowest
current consumption state.
12.6 Effects of a RESET
A device RESET forces all registers to their RESET
state. The A/D module is disabled and any conversion
in progress is aborted. All pins with analog functions
are configured as available inputs.
The ADRES register will contain unknown data after a
Power-on Reset.
AD Clock Source (T
AD)
Device
Frequency
Operation ADCS1:ADCS0 24 MHz
2T
OSC 00 83.3 ns
8TOSC 01 333.3 ns
32T
OSC 10 1.333 
RC 11 2 - 6 s
(1,2)
Note 1: The RC source has a typical TAD time of 4 s.
2: For device frequencies above 1 MHz, the
device must be in SLEEP for the entire con-
version, or the A/D accuracy may be out of
specification.
Note 1: When reading the port register, all pins
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as digital inputs will convert an ana-
log input. Analog levels on a digitally
configured input will not affect the conver-
sion accuracy.
2: Analog levels on any pin that is defined as
a digital input, but not as an analog input,
may cause the input buffer to consume
current that is out of specification.
3: The TRISE register is not provided on the
PIC16C745.
Note: The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
Note: For the A/D module to operate in SLEEP,
the A/D clock source must be set to RC
(ADCS<1:0> = 11). To perform an A/D
conversion in SLEEP, ensure the SLEEP
instruction immediately follows the instruc-
tion that sets the GO/DONE
bit.