Datasheet

 1999-2013 Microchip Technology Inc. Preliminary DS41124D-page 39
PIC16C745/765
REGISTER 5-1: PORTE DATA DIRECTION CONTROL REGISTER
(1)
(TRISE: 89h)
TABLE 5-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
R-0 R-0 R/W-0 R/W-0 U-0 R/W-1 R/W-1 R/W-1
IBF OBF IBOV PSPMODE
— TRISE2 TRISE1 TRISE0 R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit7 bit0
bit 7 : IBF: Input Buffer Full Status bit
1 = A word has been received and is waiting to be read by the CPU
0 = No word has been received
bit 6: OBF: Output Buffer Full Status bit
1 = The output buffer still holds a previously written word
0 = The output buffer has been read
bit 5: IBOV: Input Buffer Overflow Detect bit (in microprocessor mode)
1 = A write occurred when a previously input word has not been read (must be cleared in software)
0 = No overflow occurred
bit 4: PSPMODE: Parallel Slave Port Mode Select bit
1 = Parallel slave port mode
0 = General purpose I/O mode
bit 3: Unimplemented: Read as '0'
PORTE Data Direction Bits
bit 2: TRISE2: Direction Control bit for pin RE2/CS/AN7
1 = Input
0 = Output
bit 1: TRISE1: Direction Control bit for pin RE1/WR
/AN6
1 = Input
0 = Output
bit 0: TRISE0: Direction Control bit for pin RE0/RD
/AN5
1 = Input
0 = Output
Note 1: PIC16C765 only.
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on:
POR,
BOR
Value on all
other resets
09h
PORTE
(1)
— — — — —RE2RE1RE0---- -xxx ---- -uuu
89h
TRISE
(1)
IBF OBF IBOV PSPMODE — PORTE Data Direction Bits 0000 -111 0000 -111
9Fh ADCON1
— — — — — PCFG2 PCFG1 PCFG0 ---- -000 ---- -000
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by PORTE.
Note 1: PIC16C765 only.