Datasheet
1999-2013 Microchip Technology Inc. Preliminary DS41124D-page 37
PIC16C745/765
5.4 PORTD and TRISD Registers
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. Each pin is individually configured as an input or
output.
PORTD can be configured as an 8-bit wide micropro-
cessor port (parallel slave port) by setting control bit
PSPMODE (TRISE<4>). In this mode, the input buffers
are TTL.
FIGURE 5-6: PORTD BLOCK DIAGRAM
TABLE 5-7: PORTD
FUNCTIONS
TABLE 5-8: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Note: The PIC16C745 does not provide PORTD.
The PORTD and TRISD registers are
reserved. Always maintain these bits clear.
Data
Bus
WR
Port
WR
TRIS
RD Port
Data Latch
TRIS Latch
RD TRIS
Schmitt
Trigger
Input
Buffer
I/O pin
QD
CK
QD
CK
EN
QD
EN
VDD
Name Function
Input
Type
Output
Type
Description
RD0/PSP0
RD0 TTL CMOS Bi-directional I/O
(1)
PSP0 TTL — Parallel Slave Port Data Input
(1)
RD1/PSP1
RD1 TTL CMOS Bi-directional I/O
(1)
PSP1 TTL — Parallel Slave Port Data Input
(1)
RD2/PSP2
RD2 TTL CMOS Bi-directional I/O
(1)
PSP2 TTL — Parallel Slave Port Data Input
(1)
RD3/PSP3
RD3 TTL CMOS Bi-directional I/O
(1)
PSP3 TTL — Parallel Slave Port Data Input
(1)
RD4/PSP4
RD4 TTL CMOS Bi-directional I/O
(1)
PSP4 TTL — Parallel Slave Port Data Input
(1)
RD5/PSP5
RD5 TTL CMOS Bi-directional I/O
(1)
PSP5 TTL — Parallel Slave Port Data Input
(1)
RD6/PSP6
RD6 TTL CMOS Bi-directional I/O
(1)
PSP6 TTL — Parallel Slave Port Data Input
(1)
RD7/PSP7
RD7 TTL CMOS Bi-directional I/O
(1)
PSP7 TTL — Parallel Slave Port Data Input
(1)
Legend: OD = open drain, ST = Schmitt Trigger
Note 1: PIC16C765 only.
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on:
POR,
BOR
Value on all
other resets
08h
PORTD
(1)
RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0 xxxx xxxx uuuu uuuu
88h
TRISD
(1)
PORTD Data Direction Register 1111 1111 1111 1111
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by PORTD.
Note 1: PIC16C765 only.