Datasheet

PIC16C745/765
DS41124D-page 26 Preliminary  1999-2013 Microchip Technology Inc.
4.2.2.5 PIR1 REGISTER
This register contains the individual flag bits for the
peripheral interrupts.
REGISTER 4-5: PERIPHERAL INTERRUPT REGISTER1 (PIR1: 0Ch)
Note: Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
R/W-0 R/W-0 R-0 R-0 R/W-0 R/W-0 R/W-0 R/W-0
PSPIF
(1)
ADIF RCIF TXIF USBIF CCP1IF TMR2IF TMR1IF
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
-n = Value at POR reset
bit7 bit0
bit 7: PSPIF
(1)
: Parallel Slave Port Read/Write Interrupt Flag bit
1 = A read or a write operation has taken place (must be cleared in software)
0 = No read or write has occurred
bit 6: ADIF: A/D Converter Interrupt Flag bit
1 = An A/D conversion completed (must be cleared in software)
0 = The A/D conversion is not complete
bit 5: RCIF: USART Receive Interrupt Flag bit
1 = The USART receive buffer is full (clear by reading RCREG)
0 = The USART receive buffer is empty
bit 4: TXIF: USART Transmit Interrupt Flag bit
1 = The USART transmit buffer is empty (clear by writing to TXREG)
0 = The USART transmit buffer is full
bit 3: USBIF: Universal Serial Bus (USB) Interrupt Flag
1 = A USB interrupt condition has occurred. The specific cause can be found by examining the contents
of the UIR and UIE registers.
0 = No USB interrupt conditions that are enabled have occurred.
bit 2: CCP1IF: CCP1 Interrupt Flag bit
Capture Mode
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare Mode
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM Mode
Unused in this mode
bit 1: TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1 = TMR2 to PR2 match occurred (must be cleared in software)
0 = No TMR2 to PR2 match occurred
bit 0: TMR1IF: TMR1 Overflow Interrupt Flag bit
1 = TMR1 register overflowed (must be cleared in software)
0 = TMR1 register did not overflow
Note 1: Parallel slave ports not implemented on the PIC16C745; always maintain this bit clear.